gianfar: Fix RXICr/TXICr programming for multi-queue mode
The correct behavior is to program the interrupt coalescing regs (RXICr/TXICr) in accordance with the Rx/Tx Q's "rx/txcoalescing" flag. That is, if the coalescing flag is 0 for a given Rx/Tx queue then the corresponding coalescing register should be cleared. This behavior is correctly implemented for the single-queue mode (SQ_SG_MODE), but not for the multi-queue mode (MQ_MG_MODE). This fixes the later case. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1804,18 +1804,16 @@ void gfar_configure_coalescing(struct gfar_private *priv,
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if (priv->mode == MQ_MG_MODE) {
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baddr = ®s->txic0;
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for_each_set_bit(i, &tx_mask, priv->num_tx_queues) {
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if (likely(priv->tx_queue[i]->txcoalescing)) {
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gfar_write(baddr + i, 0);
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gfar_write(baddr + i, 0);
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if (likely(priv->tx_queue[i]->txcoalescing))
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gfar_write(baddr + i, priv->tx_queue[i]->txic);
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}
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}
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baddr = ®s->rxic0;
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for_each_set_bit(i, &rx_mask, priv->num_rx_queues) {
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if (likely(priv->rx_queue[i]->rxcoalescing)) {
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gfar_write(baddr + i, 0);
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gfar_write(baddr + i, 0);
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if (likely(priv->rx_queue[i]->rxcoalescing))
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gfar_write(baddr + i, priv->rx_queue[i]->rxic);
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}
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}
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}
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}
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