drm/amdgpu: Add a read after write DB_CTRL for vcn_v4_0_3
To make sure VCN DB_CTRL is delivered before doorbell write. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -195,6 +195,11 @@ static int vcn_v4_0_3_hw_init(void *handle)
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ring->doorbell_index
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<< VCN_RB1_DB_CTRL__OFFSET__SHIFT |
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VCN_RB1_DB_CTRL__EN_MASK);
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/* Read DB_CTRL to flush the write DB_CTRL command. */
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RREG32_SOC15(
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VCN, GET_INST(VCN, ring->me),
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regVCN_RB1_DB_CTRL);
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}
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r = amdgpu_ring_test_helper(ring);
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