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Devicetree changes for TI K3 platforms for v5.16 merge window: 

* New Platforms:
   - AM654: Siemens IOT2050 PG2 boards
   - J721E: Low cost SK board
 * New features:
   - mmc aliases introduced
   - AM64 ICSSG nodes, mcu pinctrl added
 * Fixes:
   - Schema fixups for pcie, thermal zones
   - Fixup to include board specific property for J721e-evm and j7200-evm
   - Misc fixups including cleaning up order in Makefile
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Merge tag 'ti-k3-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt

Devicetree changes for TI K3 platforms for v5.16 merge window:

* New Platforms:
  - AM654: Siemens IOT2050 PG2 boards
  - J721E: Low cost SK board
* New features:
  - mmc aliases introduced
  - AM64 ICSSG nodes, mcu pinctrl added
* Fixes:
  - Schema fixups for pcie, thermal zones
  - Fixup to include board specific property for J721e-evm and j7200-evm
  - Misc fixups including cleaning up order in Makefile

* tag 'ti-k3-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (24 commits)
  arm64: dts: ti: k3-j721e-sk: Add DDR carveout memory nodes
  arm64: dts: ti: k3-j721e-sk: Add IPC sub-mailbox nodes
  arm64: dts: ti: Add support for J721E SK
  dt-bindings: arm: ti: Add compatible for J721E SK
  arm64: dts: ti: iot2050: Add support for product generation 2 boards
  arm64: dts: ti: iot2050: Prepare for adding 2nd-generation boards
  dt-bindings: arm: ti: Add bindings for Siemens IOT2050 PG2 boards
  arm64: dts: ti: iot2050: Add/enabled mailboxes and carve-outs for R5F cores
  arm64: dts: ti: iot2050: Disable SR2.0-only PRUs
  arm64: dts: ti: iot2050: Flip mmc device ordering on Advanced devices
  arm64: dts: ti: k3-j7200-common-proc-board: Add j7200-evm compatible
  arm64: dts: ti: k3-j721e-common-proc-board: Add j721e-evm compatible
  dt-bindings: arm: ti: Add missing compatibles for j721e/j7200 evms
  arm64: dts: ti: Makefile: Collate AM64 platforms together
  arm64: dts: ti: k3-am64-main: Add ICSSG nodes
  arm64: dts: ti: k3-am65: Relocate thermal-zones to SoC specific location
  arm64: dts: ti: ti-k3*: Introduce aliases for mmc nodes
  arm64: dts: ti: k3-am65-main: Cleanup "ranges" property in "pcie" DT node
  arm64: dts: ti: j7200-main: Add *max-virtual-functions* for pcie-ep DT node
  arm64: dts: ti: j7200-main: Fix "bus-range" upto 256 bus number for PCIe
  ...

Link: https://lore.kernel.org/r/20211012120817.beqhp4tygnf3xyi5@wireless
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-10-12 14:51:23 +02:00
parent 86d3858e60 f46d16cf5b
commit 96c7f32d17
27 changed files with 1665 additions and 125 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
Documentation/devicetree/bindings/arm/ti/k3.yaml
View File

@ -24,16 +24,27 @@ properties:
- enum:
- ti,am654-evm
- siemens,iot2050-basic
- siemens,iot2050-basic-pg2
- siemens,iot2050-advanced
- siemens,iot2050-advanced-pg2
- const: ti,am654
- description: K3 J721E SoC
items:
oneOf:
- const: ti,j721e
- items:
- enum:
- ti,j721e-evm
- ti,j721e-sk
- const: ti,j721e
- description: K3 J7200 SoC
items:
oneOf:
- const: ti,j7200
- items:
- enum:
- ti,j7200-evm
- const: ti,j7200
- description: K3 AM642 SoC
items:

4
arch/arm64/boot/dts/ti/Makefile
View File

@ -8,12 +8,14 @@
dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb

280
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
View File

@ -973,4 +973,284 @@
clocks = <&k3_clks 53 0>;
clock-names = "fck";
};
icssg0: icssg@30000000 {
compatible = "ti,am642-icssg";
reg = <0x00 0x30000000 0x00 0x80000>;
power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0x30000000 0x80000>;
icssg0_mem: memories@0 {
reg = <0x0 0x2000>,
<0x2000 0x2000>,
<0x10000 0x10000>;
reg-names = "dram0", "dram1", "shrdram2";
};
icssg0_cfg: cfg@26000 {
compatible = "ti,pruss-cfg", "syscon";
reg = <0x26000 0x200>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x26000 0x2000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
icssg0_coreclk_mux: coreclk-mux@3c {
reg = <0x3c>;
#clock-cells = <0>;
clocks = <&k3_clks 81 0>, /* icssg0_core_clk */
<&k3_clks 81 20>; /* icssg0_iclk */
assigned-clocks = <&icssg0_coreclk_mux>;
assigned-clock-parents = <&k3_clks 81 20>;
};
icssg0_iepclk_mux: iepclk-mux@30 {
reg = <0x30>;
#clock-cells = <0>;
clocks = <&k3_clks 81 3>, /* icssg0_iep_clk */
<&icssg0_coreclk_mux>; /* icssg0_coreclk_mux */
assigned-clocks = <&icssg0_iepclk_mux>;
assigned-clock-parents = <&icssg0_coreclk_mux>;
};
};
};
icssg0_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
};
icssg0_mii_g_rt: mii-g-rt@33000 {
compatible = "ti,pruss-mii-g", "syscon";
reg = <0x33000 0x1000>;
};
icssg0_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host_intr0", "host_intr1",
"host_intr2", "host_intr3",
"host_intr4", "host_intr5",
"host_intr6", "host_intr7";
};
pru0_0: pru@34000 {
compatible = "ti,am642-pru";
reg = <0x34000 0x3000>,
<0x22000 0x100>,
<0x22400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-pru0_0-fw";
};
rtu0_0: rtu@4000 {
compatible = "ti,am642-rtu";
reg = <0x4000 0x2000>,
<0x23000 0x100>,
<0x23400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-rtu0_0-fw";
};
tx_pru0_0: txpru@a000 {
compatible = "ti,am642-tx-pru";
reg = <0xa000 0x1800>,
<0x25000 0x100>,
<0x25400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-txpru0_0-fw";
};
pru0_1: pru@38000 {
compatible = "ti,am642-pru";
reg = <0x38000 0x3000>,
<0x24000 0x100>,
<0x24400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-pru0_1-fw";
};
rtu0_1: rtu@6000 {
compatible = "ti,am642-rtu";
reg = <0x6000 0x2000>,
<0x23800 0x100>,
<0x23c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-rtu0_1-fw";
};
tx_pru0_1: txpru@c000 {
compatible = "ti,am642-tx-pru";
reg = <0xc000 0x1800>,
<0x25800 0x100>,
<0x25c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-txpru0_1-fw";
};
icssg0_mdio: mdio@32400 {
compatible = "ti,davinci_mdio";
reg = <0x32400 0x100>;
clocks = <&k3_clks 62 3>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
};
};
icssg1: icssg@30080000 {
compatible = "ti,am642-icssg";
reg = <0x00 0x30080000 0x00 0x80000>;
power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0x30080000 0x80000>;
icssg1_mem: memories@0 {
reg = <0x0 0x2000>,
<0x2000 0x2000>,
<0x10000 0x10000>;
reg-names = "dram0", "dram1", "shrdram2";
};
icssg1_cfg: cfg@26000 {
compatible = "ti,pruss-cfg", "syscon";
reg = <0x26000 0x200>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x26000 0x2000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
icssg1_coreclk_mux: coreclk-mux@3c {
reg = <0x3c>;
#clock-cells = <0>;
clocks = <&k3_clks 82 0>, /* icssg1_core_clk */
<&k3_clks 82 20>; /* icssg1_iclk */
assigned-clocks = <&icssg1_coreclk_mux>;
assigned-clock-parents = <&k3_clks 82 20>;
};
icssg1_iepclk_mux: iepclk-mux@30 {
reg = <0x30>;
#clock-cells = <0>;
clocks = <&k3_clks 82 3>, /* icssg1_iep_clk */
<&icssg1_coreclk_mux>; /* icssg1_coreclk_mux */
assigned-clocks = <&icssg1_iepclk_mux>;
assigned-clock-parents = <&icssg1_coreclk_mux>;
};
};
};
icssg1_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
};
icssg1_mii_g_rt: mii-g-rt@33000 {
compatible = "ti,pruss-mii-g", "syscon";
reg = <0x33000 0x1000>;
};
icssg1_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host_intr0", "host_intr1",
"host_intr2", "host_intr3",
"host_intr4", "host_intr5",
"host_intr6", "host_intr7";
};
pru1_0: pru@34000 {
compatible = "ti,am642-pru";
reg = <0x34000 0x4000>,
<0x22000 0x100>,
<0x22400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-pru1_0-fw";
};
rtu1_0: rtu@4000 {
compatible = "ti,am642-rtu";
reg = <0x4000 0x2000>,
<0x23000 0x100>,
<0x23400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-rtu1_0-fw";
};
tx_pru1_0: txpru@a000 {
compatible = "ti,am642-tx-pru";
reg = <0xa000 0x1800>,
<0x25000 0x100>,
<0x25400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-txpru1_0-fw";
};
pru1_1: pru@38000 {
compatible = "ti,am642-pru";
reg = <0x38000 0x4000>,
<0x24000 0x100>,
<0x24400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-pru1_1-fw";
};
rtu1_1: rtu@6000 {
compatible = "ti,am642-rtu";
reg = <0x6000 0x2000>,
<0x23800 0x100>,
<0x23c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-rtu1_1-fw";
};
tx_pru1_1: txpru@c000 {
compatible = "ti,am642-tx-pru";
reg = <0xc000 0x1800>,
<0x25800 0x100>,
<0x25c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am64x-txpru1_1-fw";
};
icssg1_mdio: mdio@32400 {
compatible = "ti,davinci_mdio";
reg = <0x32400 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&k3_clks 82 0>;
clock-names = "fck";
bus_freq = <1000000>;
};
};
};

8
arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
View File

@ -97,4 +97,12 @@
clocks = <&k3_clks 79 0>;
clock-names = "gpio";
};
mcu_pmx0: pinctrl@4084000 {
compatible = "pinctrl-single";
reg = <0x00 0x4084000 0x00 0x84>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
};

2
arch/arm64/boot/dts/ti/k3-am64.dtsi
View File

@ -30,6 +30,8 @@
serial8 = &main_uart6;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
};
chosen { };

8
arch/arm64/boot/dts/ti/k3-am642-evm.dts
View File

@ -630,3 +630,11 @@
&epwm8 {
status = "disabled";
};
&icssg0_mdio {
status = "disabled";
};
&icssg1_mdio {
status = "disabled";
};

8
arch/arm64/boot/dts/ti/k3-am642-sk.dts
View File

@ -517,3 +517,11 @@
&epwm8 {
status = "disabled";
};
&icssg0_mdio {
status = "disabled";
};
&icssg1_mdio {
status = "disabled";
};

46
arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi Normal file
View File

@ -0,0 +1,46 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Siemens AG, 2021
*
* Authors:
* Jan Kiszka <jan.kiszka@siemens.com>
*
* Common bits of the IOT2050 Basic and Advanced variants, PG1
*/
&dss {
assigned-clocks = <&k3_clks 67 2>;
assigned-clock-parents = <&k3_clks 67 5>;
};
&serdes0 {
status = "disabled";
};
&sdhci1 {
no-1-8-v;
};
&tx_pru0_0 {
status = "disabled";
};
&tx_pru0_1 {
status = "disabled";
};
&tx_pru1_0 {
status = "disabled";
};
&tx_pru1_1 {
status = "disabled";
};
&tx_pru2_0 {
status = "disabled";
};
&tx_pru2_1 {
status = "disabled";
};

51
arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi Normal file
View File

@ -0,0 +1,51 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Siemens AG, 2021
*
* Authors:
* Chao Zeng <chao.zeng@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* Common bits of the IOT2050 Basic and Advanced variants, PG2
*/
&main_pmx0 {
cp2102n_reset_pin_default: cp2102n-reset-pin-default {
pinctrl-single,pins = <
/* (AF12) GPIO1_24, used as cp2102 reset */
AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7)
>;
};
};
&main_gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&cp2102n_reset_pin_default>;
gpio-line-names =
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "CP2102N-RESET";
};
&dss {
/* Workaround needed to get DP clock of 154Mhz */
assigned-clocks = <&k3_clks 67 0>;
};
&serdes0 {
assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
};
&dwc3_0 {
assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
<&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
phys = <&serdes0 PHY_TYPE_USB3 0>;
phy-names = "usb3-phy";
};
&usb0 {
maximum-speed = "super-speed";
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
};

39
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
View File

@ -4,19 +4,19 @@
*
* Authors:
* Le Jin <le.jin@siemens.com>
* Jan Kiszka <jan.kiszk@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* Common bits of the IOT2050 Basic and Advanced variants
* Common bits of the IOT2050 Basic and Advanced variants, PG1 and PG2
*/
/dts-v1/;
#include "k3-am654.dtsi"
#include <dt-bindings/phy/phy.h>
/ {
aliases {
spi0 = &mcu_spi0;
mmc0 = &sdhci1;
mmc1 = &sdhci0;
};
chosen {
@ -555,7 +555,6 @@
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
no-1-8-v;
};
&usb0 {
@ -629,10 +628,6 @@
};
};
&serdes0 {
status = "disabled";
};
&pcie0_rc {
status = "disabled";
};
@ -656,11 +651,21 @@
};
&mailbox0_cluster0 {
status = "disabled";
interrupts = <436>;
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
ti,mbox-tx = <1 0 0>;
ti,mbox-rx = <0 0 0>;
};
};
&mailbox0_cluster1 {
status = "disabled";
interrupts = <432>;
mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
ti,mbox-tx = <1 0 0>;
ti,mbox-rx = <0 0 0>;
};
};
&mailbox0_cluster2 {
@ -703,6 +708,18 @@
status = "disabled";
};
&mcu_r5fss0_core0 {
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};
&mcu_r5fss0_core1 {
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};
&icssg0_mdio {
status = "disabled";
};

8
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
View File

@ -692,8 +692,8 @@
power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000
0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000>,
<0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
ti,syscon-pcie-id = <&pcie_devid>;
ti,syscon-pcie-mode = <&pcie0_mode>;
bus-range = <0x0 0xff>;
@ -725,8 +725,8 @@
power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000
0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>;
ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000>,
<0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>;
ti,syscon-pcie-id = <&pcie_devid>;
ti,syscon-pcie-mode = <&pcie1_mode>;
bus-range = <0x0 0xff>;

4
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi
View File

@ -100,8 +100,4 @@
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
thermal_zones: thermal-zones {
#include "k3-am654-industrial-thermal.dtsi"
};
};

2
arch/arm64/boot/dts/ti/k3-am65.dtsi
View File

@ -31,6 +31,8 @@
i2c4 = &main_i2c2;
i2c5 = &main_i2c3;
ethernet0 = &cpsw_port1;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
};
chosen { };

60
arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi Normal file
View File

@ -0,0 +1,60 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Siemens AG, 2018-2021
*
* Authors:
* Le Jin <le.jin@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* Common bits of the IOT2050 Basic variant, PG1 and PG2
*/
#include "k3-am65-iot2050-common.dtsi"
/ {
memory@80000000 {
device_type = "memory";
/* 1G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};
cpus {
cpu-map {
/delete-node/ cluster1;
};
/delete-node/ cpu@100;
/delete-node/ cpu@101;
};
/delete-node/ l2-cache1;
};
/* eMMC */
&sdhci0 {
status = "disabled";
};
&main_pmx0 {
main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
AM65X_IOPAD(0x0188, PIN_INPUT, 1) /* (D25) UART0_DCDn */
AM65X_IOPAD(0x018c, PIN_INPUT, 1) /* (B26) UART0_DSRn */
AM65X_IOPAD(0x0190, PIN_OUTPUT, 1) /* (A24) UART0_DTRn */
AM65X_IOPAD(0x0194, PIN_INPUT, 1) /* (E24) UART0_RIN */
>;
};
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
&mcu_r5fss0 {
/* lock-step mode not supported on Basic boards */
ti,cluster-mode = <0>;
};

24
arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dts Normal file
View File

@ -0,0 +1,24 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Siemens AG, 2018-2021
*
* Authors:
* Le Jin <le.jin@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 2
* 1 GB RAM, no eMMC, main_uart0 on connector X30
*
* Product homepage:
* https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
*/
/dts-v1/;
#include "k3-am6528-iot2050-basic-common.dtsi"
#include "k3-am65-iot2050-common-pg2.dtsi"
/ {
compatible = "siemens,iot2050-basic-pg2", "ti,am654";
model = "SIMATIC IOT2050 Basic PG2";
};

56
arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts
View File

@ -4,63 +4,21 @@
*
* Authors:
* Le Jin <le.jin@siemens.com>
* Jan Kiszka <jan.kiszk@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* AM6528-based (dual-core) IOT2050 Basic variant
* AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 1
* 1 GB RAM, no eMMC, main_uart0 on connector X30
*
* Product homepage:
* https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
*/
/dts-v1/;
#include "k3-am65-iot2050-common.dtsi"
#include "k3-am6528-iot2050-basic-common.dtsi"
#include "k3-am65-iot2050-common-pg1.dtsi"
/ {
compatible = "siemens,iot2050-basic", "ti,am654";
model = "SIMATIC IOT2050 Basic";
memory@80000000 {
device_type = "memory";
/* 1G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};
cpus {
cpu-map {
/delete-node/ cluster1;
};
/delete-node/ cpu@100;
/delete-node/ cpu@101;
};
/delete-node/ l2-cache1;
};
/* eMMC */
&sdhci0 {
status = "disabled";
};
&main_pmx0 {
main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
AM65X_IOPAD(0x0188, PIN_INPUT, 1) /* (D25) UART0_DCDn */
AM65X_IOPAD(0x018c, PIN_INPUT, 1) /* (B26) UART0_DSRn */
AM65X_IOPAD(0x0190, PIN_OUTPUT, 1) /* (A24) UART0_DTRn */
AM65X_IOPAD(0x0194, PIN_INPUT, 1) /* (E24) UART0_RIN */
>;
};
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
&mcu_r5fss0 {
/* lock-step mode not supported on this board */
ti,cluster-mode = <0>;
};

4
arch/arm64/boot/dts/ti/k3-am654.dtsi
View File

@ -112,4 +112,8 @@
compatible = "cache";
cache-level = <3>;
};
thermal_zones: thermal-zones {
#include "k3-am654-industrial-thermal.dtsi"
};
};

56
arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi Normal file
View File

@ -0,0 +1,56 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Siemens AG, 2018-2021
*
* Authors:
* Le Jin <le.jin@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* Common bits of the IOT2050 Advanced variant, PG1 and PG2
*/
/dts-v1/;
#include "k3-am65-iot2050-common.dtsi"
/ {
memory@80000000 {
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
};
};
&main_pmx0 {
main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
AM65X_IOPAD(0x01b8, PIN_OUTPUT_PULLUP, 7) /* (B23) MMC0_SDWP */
AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
>;
};
};
/* eMMC */
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
bus-width = <8>;
non-removable;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&main_uart0 {
status = "disabled";
};

29
arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts Normal file
View File

@ -0,0 +1,29 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Siemens AG, 2018-2021
*
* Authors:
* Le Jin <le.jin@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 2
* 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
*
* Product homepage:
* https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
*/
/dts-v1/;
#include "k3-am6548-iot2050-advanced-common.dtsi"
#include "k3-am65-iot2050-common-pg2.dtsi"
/ {
compatible = "siemens,iot2050-advanced-pg2", "ti,am654";
model = "SIMATIC IOT2050 Advanced PG2";
};
&mcu_r5fss0 {
/* lock-step mode not supported on this board */
ti,cluster-mode = <0>;
};

50
arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts
View File

@ -4,57 +4,21 @@
*
* Authors:
* Le Jin <le.jin@siemens.com>
* Jan Kiszka <jan.kiszk@siemens.com>
* Jan Kiszka <jan.kiszka@siemens.com>
*
* AM6548-based (quad-core) IOT2050 Advanced variant
* AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 1
* 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
*
* Product homepage:
* https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
*/
/dts-v1/;
#include "k3-am65-iot2050-common.dtsi"
#include "k3-am6548-iot2050-advanced-common.dtsi"
#include "k3-am65-iot2050-common-pg1.dtsi"
/ {
compatible = "siemens,iot2050-advanced", "ti,am654";
model = "SIMATIC IOT2050 Advanced";
memory@80000000 {
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
};
};
&main_pmx0 {
main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
AM65X_IOPAD(0x01b8, PIN_OUTPUT_PULLUP, 7) /* (B23) MMC0_SDWP */
AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
>;
};
};
/* eMMC */
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
bus-width = <8>;
non-removable;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&main_uart0 {
status = "disabled";
};

3
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
View File

@ -12,6 +12,9 @@
#include <dt-bindings/phy/phy.h>
/ {
compatible = "ti,j7200-evm", "ti,j7200";
model = "Texas Instruments J7200 EVM";
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";

7
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
View File

@ -606,10 +606,10 @@
clock-names = "fck";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0xf>;
bus-range = <0x0 0xff>;
cdns,no-bar-match-nbits = <64>;
vendor-id = /bits/ 16 <0x104c>;
device-id = /bits/ 16 <0xb00f>;
vendor-id = <0x104c>;
device-id = <0xb00f>;
msi-map = <0x0 &gic_its 0x0 0x10000>;
dma-coherent;
ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>,
@ -633,6 +633,7 @@
clocks = <&k3_clks 240 6>;
clock-names = "fck";
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
dma-coherent;
};

2
arch/arm64/boot/dts/ti/k3-j7200.dtsi
View File

@ -30,6 +30,8 @@
serial9 = &main_uart7;
serial10 = &main_uart8;
serial11 = &main_uart9;
mmc0 = &main_sdhci0;
mmc1 = &main_sdhci1;
};
chosen { };

3
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
View File

@ -12,6 +12,9 @@
#include <dt-bindings/phy/phy-cadence.h>
/ {
compatible = "ti,j721e-evm", "ti,j721e";
model = "Texas Instruments J721e EVM";
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";

16
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
View File

@ -610,7 +610,7 @@
clock-names = "fck";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0xf>;
bus-range = <0x0 0xff>;
vendor-id = <0x104c>;
device-id = <0xb00d>;
msi-map = <0x0 &gic_its 0x0 0x10000>;
@ -636,7 +636,7 @@
clocks = <&k3_clks 239 1>;
clock-names = "fck";
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
dma-coherent;
};
@ -658,7 +658,7 @@
clock-names = "fck";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0xf>;
bus-range = <0x0 0xff>;
vendor-id = <0x104c>;
device-id = <0xb00d>;
msi-map = <0x0 &gic_its 0x10000 0x10000>;
@ -684,7 +684,7 @@
clocks = <&k3_clks 240 1>;
clock-names = "fck";
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
dma-coherent;
};
@ -706,7 +706,7 @@
clock-names = "fck";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0xf>;
bus-range = <0x0 0xff>;
vendor-id = <0x104c>;
device-id = <0xb00d>;
msi-map = <0x0 &gic_its 0x20000 0x10000>;
@ -732,7 +732,7 @@
clocks = <&k3_clks 241 1>;
clock-names = "fck";
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
dma-coherent;
};
@ -754,7 +754,7 @@
clock-names = "fck";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0xf>;
bus-range = <0x0 0xff>;
vendor-id = <0x104c>;
device-id = <0xb00d>;
msi-map = <0x0 &gic_its 0x30000 0x10000>;
@ -780,7 +780,7 @@
clocks = <&k3_clks 242 1>;
clock-names = "fck";
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
dma-coherent;
#address-cells = <2>;
#size-cells = <2>;

1002
arch/arm64/boot/dts/ti/k3-j721e-sk.dts Normal file
View File

File diff suppressed because it is too large Load Diff

3
arch/arm64/boot/dts/ti/k3-j721e.dtsi
View File

@ -31,6 +31,9 @@
serial10 = &main_uart8;
serial11 = &main_uart9;
ethernet0 = &cpsw_port1;
mmc0 = &main_sdhci0;
mmc1 = &main_sdhci1;
mmc2 = &main_sdhci2;
};
chosen { };