arm64: dts: hisi: add kirin pcie node
Add PCIe node for hi3660 Cc: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Changes in v5: * fix interrupt-map, to conform to gic's #address-cells = <0> * remove redundant status = "ok" Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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@ -754,5 +754,41 @@
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cs-gpios = <&gpio18 5 0>;
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status = "disabled";
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};
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pcie@f4000000 {
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compatible = "hisilicon,kirin960-pcie";
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reg = <0x0 0xf4000000 0x0 0x1000>,
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<0x0 0xff3fe000 0x0 0x1000>,
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<0x0 0xf3f20000 0x0 0x40000>,
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<0x0 0xf5000000 0x0 0x2000>;
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reg-names = "dbi", "apb", "phy", "config";
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bus-range = <0x0 0x1>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x02000000 0x0 0x00000000
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0x0 0xf6000000
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0x0 0x02000000>;
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num-lanes = <1>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0x0 0 0 1
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&gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
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<0x0 0 0 2
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&gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
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<0x0 0 0 3
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&gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
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<0x0 0 0 4
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&gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
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<&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
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<&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
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<&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
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<&crg_ctrl HI3660_ACLK_GATE_PCIE>;
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clock-names = "pcie_phy_ref", "pcie_aux",
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"pcie_apb_phy", "pcie_apb_sys",
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"pcie_aclk";
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reset-gpios = <&gpio11 1 0 >;
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};
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};
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};
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