powerpc/signal32: Isolate non-copy actions in save_user_regs() and save_tm_user_regs()
Reorder actions in save_user_regs() and save_tm_user_regs() to regroup copies together in order to switch to user_access_begin() logic in a later patch. Move non-copy actions into new functions called prepare_save_user_regs() and prepare_save_tm_user_regs(). Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/f6eac65781b4a57220477c8864bca2b57f29a5d5.1597770847.git.christophe.leroy@csgroup.eu
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@ -229,14 +229,31 @@ struct rt_sigframe {
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* We only save the altivec/spe registers if the process has used
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* altivec/spe instructions at some point.
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*/
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static void prepare_save_user_regs(int ctx_has_vsx_region)
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{
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/* Make sure floating point registers are stored in regs */
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flush_fp_to_thread(current);
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#ifdef CONFIG_ALTIVEC
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if (current->thread.used_vr)
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flush_altivec_to_thread(current);
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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current->thread.vrsave = mfspr(SPRN_VRSAVE);
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#endif
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#ifdef CONFIG_VSX
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if (current->thread.used_vsr && ctx_has_vsx_region)
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flush_vsx_to_thread(current);
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#endif
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#ifdef CONFIG_SPE
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if (current->thread.used_spe)
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flush_spe_to_thread(current);
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#endif
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}
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static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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struct mcontext __user *tm_frame, int ctx_has_vsx_region)
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{
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unsigned long msr = regs->msr;
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/* Make sure floating point registers are stored in regs */
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flush_fp_to_thread(current);
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/* save general registers */
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if (save_general_regs(regs, frame))
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return 1;
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@ -244,7 +261,6 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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#ifdef CONFIG_ALTIVEC
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/* save altivec registers */
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if (current->thread.used_vr) {
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flush_altivec_to_thread(current);
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if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state,
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ELF_NVRREG * sizeof(vector128)))
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return 1;
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@ -260,8 +276,6 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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* most significant bits of that same vector. --BenH
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* Note that the current VRSAVE value is in the SPR at this point.
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*/
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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current->thread.vrsave = mfspr(SPRN_VRSAVE);
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if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
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return 1;
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#endif /* CONFIG_ALTIVEC */
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@ -281,7 +295,6 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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* contains valid data
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*/
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if (current->thread.used_vsr && ctx_has_vsx_region) {
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flush_vsx_to_thread(current);
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if (copy_vsx_to_user(&frame->mc_vsregs, current))
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return 1;
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msr |= MSR_VSX;
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@ -290,7 +303,6 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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#ifdef CONFIG_SPE
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/* save spe registers */
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if (current->thread.used_spe) {
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flush_spe_to_thread(current);
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if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
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ELF_NEVRREG * sizeof(u32)))
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return 1;
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@ -326,11 +338,23 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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*
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* See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
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*/
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static int save_tm_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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struct mcontext __user *tm_frame, unsigned long msr)
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static void prepare_save_tm_user_regs(void)
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{
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WARN_ON(tm_suspend_disabled);
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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current->thread.ckvrsave = mfspr(SPRN_VRSAVE);
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#endif
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#ifdef CONFIG_SPE
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if (current->thread.used_spe)
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flush_spe_to_thread(current);
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#endif
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}
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static int save_tm_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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struct mcontext __user *tm_frame, unsigned long msr)
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{
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/* Save both sets of general registers */
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if (save_general_regs(¤t->thread.ckpt_regs, frame)
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|| save_general_regs(regs, tm_frame))
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@ -374,8 +398,6 @@ static int save_tm_user_regs(struct pt_regs *regs, struct mcontext __user *frame
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* significant bits of a vector, we "cheat" and stuff VRSAVE in the
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* most significant bits of that same vector. --BenH
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*/
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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current->thread.ckvrsave = mfspr(SPRN_VRSAVE);
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if (__put_user(current->thread.ckvrsave,
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(u32 __user *)&frame->mc_vregs[32]))
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return 1;
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@ -427,7 +449,6 @@ static int save_tm_user_regs(struct pt_regs *regs, struct mcontext __user *frame
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* simply the same as in save_user_regs().
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*/
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if (current->thread.used_spe) {
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flush_spe_to_thread(current);
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if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
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ELF_NEVRREG * sizeof(u32)))
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return 1;
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@ -447,6 +468,8 @@ static int save_tm_user_regs(struct pt_regs *regs, struct mcontext __user *frame
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return 0;
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}
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#else
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static void prepare_save_tm_user_regs(void) { }
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static int save_tm_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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struct mcontext __user *tm_frame, unsigned long msr)
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{
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@ -790,9 +813,11 @@ int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset,
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flush_icache_range(tramp, tramp + 2 * sizeof(unsigned long));
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if (MSR_TM_ACTIVE(msr)) {
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prepare_save_tm_user_regs();
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if (save_tm_user_regs(regs, mctx, tm_mctx, msr))
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goto badframe;
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} else {
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prepare_save_user_regs(1);
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if (save_user_regs(regs, mctx, tm_mctx, 1))
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goto badframe;
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}
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@ -881,9 +906,11 @@ int handle_signal32(struct ksignal *ksig, sigset_t *oldset,
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flush_icache_range(tramp, tramp + 2 * sizeof(unsigned long));
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if (MSR_TM_ACTIVE(msr)) {
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prepare_save_tm_user_regs();
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if (save_tm_user_regs(regs, mctx, tm_mctx, msr))
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goto badframe;
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} else {
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prepare_save_user_regs(1);
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if (save_user_regs(regs, mctx, tm_mctx, 1))
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goto badframe;
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}
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@ -1038,6 +1065,7 @@ SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
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*/
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mctx = (struct mcontext __user *)
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((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
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prepare_save_user_regs(ctx_has_vsx_region);
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if (save_user_regs(regs, mctx, NULL, ctx_has_vsx_region))
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return -EFAULT;
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if (!user_write_access_begin(old_ctx, ctx_size))
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