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drm: sti: add cursor plane 

stih407 SoC have a dedicated hardware cursor plane,
this patch enable it.
The hardware have a color look up table, fix it to
be able to use ARGB8888.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
This commit is contained in:
Benjamin Gaignard 2014-12-11 13:34:42 +01:00
parent 5e03abc52c
commit 96006a770d
7 changed files with 273 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/sti/Makefile
View File

@ -3,6 +3,7 @@ sticompositor-y := \
sti_mixer.o \
sti_gdp.o \
sti_vid.o \
sti_cursor.o \
sti_compositor.o \
sti_drm_crtc.o \
sti_drm_plane.o

8
drivers/gpu/drm/sti/sti_compositor.c
View File

@ -24,8 +24,9 @@
* stiH407 compositor properties
*/
struct sti_compositor_data stih407_compositor_data = {
.nb_subdev = 7,
.nb_subdev = 8,
.subdev_desc = {
{STI_CURSOR_SUBDEV, (int)STI_CURSOR, 0x000},
{STI_GPD_SUBDEV, (int)STI_GDP_0, 0x100},
{STI_GPD_SUBDEV, (int)STI_GDP_1, 0x200},
{STI_GPD_SUBDEV, (int)STI_GDP_2, 0x300},
@ -68,11 +69,11 @@ static int sti_compositor_init_subdev(struct sti_compositor *compo,
break;
case STI_GPD_SUBDEV:
case STI_VID_SUBDEV:
case STI_CURSOR_SUBDEV:
compo->layer[layer_id++] =
sti_layer_create(compo->dev, desc[i].id,
compo->regs + desc[i].offset);
break;
/* case STI_CURSOR_SUBDEV : TODO */
default:
DRM_ERROR("Unknow subdev compoment type\n");
return 1;
@ -125,11 +126,12 @@ static int sti_compositor_bind(struct device *dev, struct device *master,
}
/* The first planes are reserved for primary planes*/
if (crtc < compo->nb_mixers) {
if (crtc < compo->nb_mixers && primary) {
sti_drm_crtc_init(drm_dev, compo->mixer[crtc],
primary, cursor);
crtc++;
cursor = NULL;
primary = NULL;
}
}
}

242
drivers/gpu/drm/sti/sti_cursor.c Normal file
View File

@ -0,0 +1,242 @@
/*
* Copyright (C) STMicroelectronics SA 2014
* Authors: Vincent Abriou <vincent.abriou@st.com>
* Fabien Dessenne <fabien.dessenne@st.com>
* for STMicroelectronics.
* License terms: GNU General Public License (GPL), version 2
*/
#include <drm/drmP.h>
#include "sti_cursor.h"
#include "sti_layer.h"
#include "sti_vtg.h"
/* Registers */
#define CUR_CTL 0x00
#define CUR_VPO 0x0C
#define CUR_PML 0x14
#define CUR_PMP 0x18
#define CUR_SIZE 0x1C
#define CUR_CML 0x20
#define CUR_AWS 0x28
#define CUR_AWE 0x2C
#define CUR_CTL_CLUT_UPDATE BIT(1)
#define STI_CURS_MIN_SIZE 1
#define STI_CURS_MAX_SIZE 128
/*
* pixmap dma buffer stucture
*
* @paddr: physical address
* @size: buffer size
* @base: virtual address
*/
struct dma_pixmap {
dma_addr_t paddr;
size_t size;
void *base;
};
/**
* STI Cursor structure
*
* @layer: layer structure
* @width: cursor width
* @height: cursor height
* @clut: color look up table
* @clut_paddr: color look up table physical address
* @pixmap: pixmap dma buffer (clut8-format cursor)
*/
struct sti_cursor {
struct sti_layer layer;
unsigned int width;
unsigned int height;
unsigned short *clut;
dma_addr_t clut_paddr;
struct dma_pixmap pixmap;
};
static const uint32_t cursor_supported_formats[] = {
DRM_FORMAT_ARGB8888,
};
#define to_sti_cursor(x) container_of(x, struct sti_cursor, layer)
static const uint32_t *sti_cursor_get_formats(struct sti_layer *layer)
{
return cursor_supported_formats;
}
static unsigned int sti_cursor_get_nb_formats(struct sti_layer *layer)
{
return ARRAY_SIZE(cursor_supported_formats);
}
static void sti_cursor_argb8888_to_clut8(struct sti_layer *layer)
{
struct sti_cursor *cursor = to_sti_cursor(layer);
u32 *src = layer->vaddr;
u8 *dst = cursor->pixmap.base;
unsigned int i, j;
u32 a, r, g, b;
for (i = 0; i < cursor->height; i++) {
for (j = 0; j < cursor->width; j++) {
/* Pick the 2 higher bits of each component */
a = (*src >> 30) & 3;
r = (*src >> 22) & 3;
g = (*src >> 14) & 3;
b = (*src >> 6) & 3;
*dst = a << 6 | r << 4 | g << 2 | b;
src++;
dst++;
}
}
}
static int sti_cursor_prepare_layer(struct sti_layer *layer, bool first_prepare)
{
struct sti_cursor *cursor = to_sti_cursor(layer);
struct drm_display_mode *mode = layer->mode;
u32 y, x;
u32 val;
DRM_DEBUG_DRIVER("\n");
dev_dbg(layer->dev, "%s %s\n", __func__, sti_layer_to_str(layer));
if (layer->src_w < STI_CURS_MIN_SIZE ||
layer->src_h < STI_CURS_MIN_SIZE ||
layer->src_w > STI_CURS_MAX_SIZE ||
layer->src_h > STI_CURS_MAX_SIZE) {
DRM_ERROR("Invalid cursor size (%dx%d)\n",
layer->src_w, layer->src_h);
return -EINVAL;
}
/* If the cursor size has changed, re-allocated the pixmap */
if (!cursor->pixmap.base ||
(cursor->width != layer->src_w) ||
(cursor->height != layer->src_h)) {
cursor->width = layer->src_w;
cursor->height = layer->src_h;
if (cursor->pixmap.base)
dma_free_writecombine(layer->dev,
cursor->pixmap.size,
cursor->pixmap.base,
cursor->pixmap.paddr);
cursor->pixmap.size = cursor->width * cursor->height;
cursor->pixmap.base = dma_alloc_writecombine(layer->dev,
cursor->pixmap.size,
&cursor->pixmap.paddr,
GFP_KERNEL | GFP_DMA);
if (!cursor->pixmap.base) {
DRM_ERROR("Failed to allocate memory for pixmap\n");
return -ENOMEM;
}
}
/* Convert ARGB8888 to CLUT8 */
sti_cursor_argb8888_to_clut8(layer);
/* AWS and AWE depend on the mode */
y = sti_vtg_get_line_number(*mode, 0);
x = sti_vtg_get_pixel_number(*mode, 0);
val = y << 16 | x;
writel(val, layer->regs + CUR_AWS);
y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
val = y << 16 | x;
writel(val, layer->regs + CUR_AWE);
if (first_prepare) {
/* Set and fetch CLUT */
writel(cursor->clut_paddr, layer->regs + CUR_CML);
writel(CUR_CTL_CLUT_UPDATE, layer->regs + CUR_CTL);
}
return 0;
}
static int sti_cursor_commit_layer(struct sti_layer *layer)
{
struct sti_cursor *cursor = to_sti_cursor(layer);
struct drm_display_mode *mode = layer->mode;
u32 ydo, xdo;
dev_dbg(layer->dev, "%s %s\n", __func__, sti_layer_to_str(layer));
/* Set memory location, size, and position */
writel(cursor->pixmap.paddr, layer->regs + CUR_PML);
writel(cursor->width, layer->regs + CUR_PMP);
writel(cursor->height << 16 | cursor->width, layer->regs + CUR_SIZE);
ydo = sti_vtg_get_line_number(*mode, layer->dst_y);
xdo = sti_vtg_get_pixel_number(*mode, layer->dst_y);
writel((ydo << 16) | xdo, layer->regs + CUR_VPO);
return 0;
}
static int sti_cursor_disable_layer(struct sti_layer *layer)
{
return 0;
}
static void sti_cursor_init(struct sti_layer *layer)
{
struct sti_cursor *cursor = to_sti_cursor(layer);
unsigned short *base = cursor->clut;
unsigned int a, r, g, b;
/* Assign CLUT values, ARGB444 format */
for (a = 0; a < 4; a++)
for (r = 0; r < 4; r++)
for (g = 0; g < 4; g++)
for (b = 0; b < 4; b++)
*base++ = (a * 5) << 12 |
(r * 5) << 8 |
(g * 5) << 4 |
(b * 5);
}
static const struct sti_layer_funcs cursor_ops = {
.get_formats = sti_cursor_get_formats,
.get_nb_formats = sti_cursor_get_nb_formats,
.init = sti_cursor_init,
.prepare = sti_cursor_prepare_layer,
.commit = sti_cursor_commit_layer,
.disable = sti_cursor_disable_layer,
};
struct sti_layer *sti_cursor_create(struct device *dev)
{
struct sti_cursor *cursor;
cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
if (!cursor) {
DRM_ERROR("Failed to allocate memory for cursor\n");
return NULL;
}
/* Allocate clut buffer */
cursor->clut = dma_alloc_writecombine(dev,
0x100 * sizeof(unsigned short),
&cursor->clut_paddr,
GFP_KERNEL | GFP_DMA);
if (!cursor->clut) {
DRM_ERROR("Failed to allocate memory for cursor clut\n");
devm_kfree(dev, cursor);
return NULL;
}
cursor->layer.ops = &cursor_ops;
return (struct sti_layer *)cursor;
}

12
drivers/gpu/drm/sti/sti_cursor.h Normal file
View File

@ -0,0 +1,12 @@
/*
* Copyright (C) STMicroelectronics SA 2013
* Authors: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
* License terms: GNU General Public License (GPL), version 2
*/
#ifndef _STI_CURSOR_H_
#define _STI_CURSOR_H_
struct sti_layer *sti_cursor_create(struct device *dev);
#endif

5
drivers/gpu/drm/sti/sti_layer.c
View File

@ -11,6 +11,7 @@
#include <drm/drm_fb_cma_helper.h>
#include "sti_compositor.h"
#include "sti_cursor.h"
#include "sti_gdp.h"
#include "sti_layer.h"
#include "sti_vid.h"
@ -50,6 +51,9 @@ struct sti_layer *sti_layer_create(struct device *dev, int desc,
case STI_VID:
layer = sti_vid_create(dev);
break;
case STI_CUR:
layer = sti_cursor_create(dev);
break;
}
if (!layer) {
@ -100,6 +104,7 @@ int sti_layer_prepare(struct sti_layer *layer, struct drm_framebuffer *fb,
layer->src_w = src_w;
layer->src_h = src_h;
layer->format = fb->pixel_format;
layer->vaddr = cma_obj->vaddr;
layer->paddr = cma_obj->paddr;
for (i = 0; i < 4; i++) {
layer->pitches[i] = fb->pitches[i];

2
drivers/gpu/drm/sti/sti_layer.h
View File

@ -82,6 +82,7 @@ struct sti_layer_funcs {
* @format: format
* @pitches: pitch of 'planes' (eg: Y, U, V)
* @offsets: offset of 'planes'
* @vaddr: virtual address of the input buffer
* @paddr: physical address of the input buffer
*/
struct sti_layer {
@ -102,6 +103,7 @@ struct sti_layer {
uint32_t format;
unsigned int pitches[4];
unsigned int offsets[4];
void *vaddr;
dma_addr_t paddr;
};

6
drivers/gpu/drm/sti/sti_mixer.c
View File

@ -45,6 +45,7 @@ static const u32 mixerColorSpaceMatIdentity[] = {
#define GAM_CTL_GDP1_MASK BIT(4)
#define GAM_CTL_GDP2_MASK BIT(5)
#define GAM_CTL_GDP3_MASK BIT(6)
#define GAM_CTL_CURSOR_MASK BIT(9)
const char *sti_mixer_to_str(struct sti_mixer *mixer)
{
@ -127,6 +128,9 @@ int sti_mixer_set_layer_depth(struct sti_mixer *mixer, struct sti_layer *layer)
case STI_VID_1:
layer_id = GAM_DEPTH_VID1_ID;
break;
case STI_CURSOR:
/* no need to set depth for cursor */
return 0;
default:
DRM_ERROR("Unknown layer %d\n", layer->desc);
return 1;
@ -188,6 +192,8 @@ static u32 sti_mixer_get_layer_mask(struct sti_layer *layer)
return GAM_CTL_VID0_MASK;
case STI_VID_1:
return GAM_CTL_VID1_MASK;
case STI_CURSOR:
return GAM_CTL_CURSOR_MASK;
default:
return 0;
}