drm/nouveau/gr/gf100-: make global bundle_cb actually global
This was thought to be per-channel initially - it's not. The backing pages for the VMM mappings are shared for all channels. - switches to more straight-forward patch interfaces - prepares for sub-context support Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs
parent
d05095b53c
commit
95f78acd88
drivers/gpu/drm/nouveau/nvkm/engine/gr
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@ -1050,15 +1050,12 @@ gf100_grctx_generate_r419cb8(struct gf100_gr *gr)
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}
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void
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gf100_grctx_generate_bundle(struct gf100_grctx *info)
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gf100_grctx_generate_bundle(struct gf100_gr_chan *chan, u64 addr, u32 size)
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{
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const struct gf100_grctx_func *grctx = info->gr->func->grctx;
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const int s = 8;
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const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);
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mmio_refn(info, 0x408004, 0x00000000, s, b);
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mmio_wr32(info, 0x408008, 0x80000000 | (grctx->bundle_size >> s));
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mmio_refn(info, 0x418808, 0x00000000, s, b);
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mmio_wr32(info, 0x41880c, 0x80000000 | (grctx->bundle_size >> s));
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gf100_grctx_patch_wr32(chan, 0x408004, addr >> 8);
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gf100_grctx_patch_wr32(chan, 0x408008, 0x80000000 | (size >> 8));
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gf100_grctx_patch_wr32(chan, 0x418808, addr >> 8);
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gf100_grctx_patch_wr32(chan, 0x41880c, 0x80000000 | (size >> 8));
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}
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void
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@ -1396,7 +1393,7 @@ gf100_grctx_generate_main(struct gf100_gr_chan *chan, struct gf100_grctx *info)
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idle_timeout = nvkm_mask(device, 0x404154, 0xffffffff, 0x00000000);
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grctx->pagepool(chan, chan->pagepool->addr);
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grctx->bundle(info);
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grctx->bundle(chan, chan->bundle_cb->addr, grctx->bundle_size);
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grctx->attrib(info);
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if (grctx->patch_ltc)
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grctx->patch_ltc(info);
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@ -39,7 +39,7 @@ struct gf100_grctx_func {
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const struct gf100_gr_pack *mthd;
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const struct gf100_gr_pack *sw_veid_bundle_init;
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/* bundle circular buffer */
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void (*bundle)(struct gf100_grctx *);
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void (*bundle)(struct gf100_gr_chan *, u64 addr, u32 size);
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u32 bundle_size;
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u32 bundle_min_gpm_fifo_depth;
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u32 bundle_token_limit;
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@ -84,8 +84,8 @@ struct gf100_grctx_func {
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extern const struct gf100_grctx_func gf100_grctx;
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int gf100_grctx_generate(struct gf100_gr *, struct gf100_gr_chan *, struct nvkm_gpuobj *inst);
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void gf100_grctx_generate_main(struct gf100_gr_chan *, struct gf100_grctx *);
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void gf100_grctx_generate_bundle(struct gf100_grctx *);
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void gf100_grctx_generate_pagepool(struct gf100_gr_chan *, u64);
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void gf100_grctx_generate_bundle(struct gf100_gr_chan *, u64, u32);
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void gf100_grctx_generate_attrib(struct gf100_grctx *);
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void gf100_grctx_generate_unkn(struct gf100_gr *);
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void gf100_grctx_generate_floorsweep(struct gf100_gr *);
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@ -116,8 +116,8 @@ void gk104_grctx_generate_alpha_beta_tables(struct gf100_gr *);
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void gk104_grctx_generate_gpc_tpc_nr(struct gf100_gr *);
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extern const struct gf100_grctx_func gk20a_grctx;
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void gk104_grctx_generate_bundle(struct gf100_grctx *);
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void gk104_grctx_generate_pagepool(struct gf100_gr_chan *, u64);
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void gk104_grctx_generate_bundle(struct gf100_gr_chan *, u64, u32);
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void gk104_grctx_generate_patch_ltc(struct gf100_grctx *);
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void gk104_grctx_generate_unkn(struct gf100_gr *);
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void gk104_grctx_generate_r418800(struct gf100_gr *);
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@ -129,8 +129,8 @@ extern const struct gf100_grctx_func gk110b_grctx;
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extern const struct gf100_grctx_func gk208_grctx;
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extern const struct gf100_grctx_func gm107_grctx;
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void gm107_grctx_generate_bundle(struct gf100_grctx *);
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void gm107_grctx_generate_pagepool(struct gf100_gr_chan *, u64);
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void gm107_grctx_generate_bundle(struct gf100_gr_chan *, u64, u32);
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void gm107_grctx_generate_attrib(struct gf100_grctx *);
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void gm107_grctx_generate_sm_id(struct gf100_gr *, int, int, int);
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@ -872,19 +872,14 @@ gk104_grctx_generate_patch_ltc(struct gf100_grctx *info)
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}
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void
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gk104_grctx_generate_bundle(struct gf100_grctx *info)
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gk104_grctx_generate_bundle(struct gf100_gr_chan *chan, u64 addr, u32 size)
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{
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const struct gf100_grctx_func *grctx = info->gr->func->grctx;
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const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth,
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grctx->bundle_size / 0x20);
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const struct gf100_grctx_func *grctx = chan->gr->func->grctx;
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const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth, size / 0x20);
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const u32 token_limit = grctx->bundle_token_limit;
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const int s = 8;
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const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);
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mmio_refn(info, 0x408004, 0x00000000, s, b);
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mmio_wr32(info, 0x408008, 0x80000000 | (grctx->bundle_size >> s));
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mmio_refn(info, 0x418808, 0x00000000, s, b);
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mmio_wr32(info, 0x41880c, 0x80000000 | (grctx->bundle_size >> s));
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mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);
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gf100_grctx_generate_bundle(chan, addr, size);
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gf100_grctx_patch_wr32(chan, 0x4064c8, (state_limit << 16) | token_limit);
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}
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void
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@ -62,7 +62,7 @@ gk20a_grctx_generate_main(struct gf100_gr_chan *chan, struct gf100_grctx *info)
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gf100_gr_icmd(gr, gr->bundle);
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grctx->pagepool(chan, chan->pagepool->addr);
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grctx->bundle(info);
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grctx->bundle(chan, chan->bundle_cb->addr, grctx->bundle_size);
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}
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const struct gf100_grctx_func
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@ -876,19 +876,17 @@ gm107_grctx_generate_r419e00(struct gf100_gr *gr)
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}
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void
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gm107_grctx_generate_bundle(struct gf100_grctx *info)
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gm107_grctx_generate_bundle(struct gf100_gr_chan *chan, u64 addr, u32 size)
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{
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const struct gf100_grctx_func *grctx = info->gr->func->grctx;
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const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth,
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grctx->bundle_size / 0x20);
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const struct gf100_grctx_func *grctx = chan->gr->func->grctx;
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const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth, size / 0x20);
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const u32 token_limit = grctx->bundle_token_limit;
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const int s = 8;
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const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);
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mmio_refn(info, 0x408004, 0x00000000, s, b);
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mmio_wr32(info, 0x408008, 0x80000000 | (grctx->bundle_size >> s));
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mmio_refn(info, 0x418e24, 0x00000000, s, b);
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mmio_wr32(info, 0x418e28, 0x80000000 | (grctx->bundle_size >> s));
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mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);
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gf100_grctx_patch_wr32(chan, 0x408004, addr >> 8);
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gf100_grctx_patch_wr32(chan, 0x408008, 0x80000000 | (size >> 8));
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gf100_grctx_patch_wr32(chan, 0x418e24, addr >> 8);
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gf100_grctx_patch_wr32(chan, 0x418e28, 0x80000000 | (size >> 8));
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gf100_grctx_patch_wr32(chan, 0x4064c8, (state_limit << 16) | token_limit);
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}
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void
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@ -65,7 +65,7 @@ gm20b_grctx_generate_main(struct gf100_gr_chan *chan, struct gf100_grctx *info)
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gf100_gr_icmd(gr, gr->bundle);
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grctx->pagepool(chan, chan->pagepool->addr);
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grctx->bundle(info);
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grctx->bundle(chan, chan->bundle_cb->addr, grctx->bundle_size);
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}
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const struct gf100_grctx_func
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@ -365,6 +365,7 @@ gf100_gr_chan_dtor(struct nvkm_object *object)
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nvkm_vmm_put(chan->vmm, &chan->mmio_vma);
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nvkm_memory_unref(&chan->mmio);
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nvkm_vmm_put(chan->vmm, &chan->bundle_cb);
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nvkm_vmm_put(chan->vmm, &chan->pagepool);
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nvkm_vmm_unref(&chan->vmm);
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return chan;
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@ -405,6 +406,15 @@ gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
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if (ret)
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return ret;
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/* Map bundle circular buffer. */
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ret = nvkm_vmm_get(chan->vmm, 12, nvkm_memory_size(gr->bundle_cb), &chan->bundle_cb);
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if (ret)
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return ret;
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ret = nvkm_memory_map(gr->bundle_cb, 0, chan->vmm, chan->bundle_cb, &args, sizeof(args));
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if (ret)
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return ret;
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/* Generate golden context image. */
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mutex_lock(&gr->fecs.mutex);
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if (gr->data == NULL) {
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@ -461,6 +471,7 @@ gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
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/* finally, fill in the mmio list and point the context at it */
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nvkm_kmap(chan->mmio);
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gr->func->grctx->pagepool(chan, chan->pagepool->addr);
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gr->func->grctx->bundle(chan, chan->bundle_cb->addr, gr->func->grctx->bundle_size);
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for (i = 0; mmio->addr && i < ARRAY_SIZE(gr->mmio_list); i++) {
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u32 addr = mmio->addr;
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u32 data = mmio->data;
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@ -1982,6 +1993,11 @@ gf100_gr_oneinit(struct nvkm_gr *base)
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if (ret)
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return ret;
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ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, gr->func->grctx->bundle_size,
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0x100, false, &gr->bundle_cb);
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if (ret)
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return ret;
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memset(gr->tile, 0xff, sizeof(gr->tile));
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gr->func->oneinit_tiles(gr);
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gr->func->oneinit_sm_id(gr);
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@ -2051,6 +2067,7 @@ gf100_gr_dtor(struct nvkm_gr *base)
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kfree(gr->data);
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nvkm_memory_unref(&gr->bundle_cb);
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nvkm_memory_unref(&gr->pagepool);
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nvkm_falcon_dtor(&gr->gpccs.falcon);
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@ -122,6 +122,7 @@ struct gf100_gr {
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u8 ppc_tpc_max;
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struct nvkm_memory *pagepool;
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struct nvkm_memory *bundle_cb;
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u8 screen_tile_row_offset;
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u8 tile[TPC_MAX];
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@ -261,6 +262,7 @@ struct gf100_gr_chan {
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struct nvkm_vmm *vmm;
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struct nvkm_vma *pagepool;
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struct nvkm_vma *bundle_cb;
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struct nvkm_memory *mmio;
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struct nvkm_vma *mmio_vma;
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