ARM: dts: imx: update snvs to use syscon access register
snvs is MFP device. Change dts to use syscon to allocate register resource. snvs power off also switch to common syscon-poweroff Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -718,22 +718,23 @@
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fsl,anatop = <&anatop>;
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};
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snvs@020cc000 {
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compatible = "fsl,sec-v4.0-mon", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x020cc000 0x4000>;
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snvs: snvs@020cc000 {
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compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
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reg = <0x020cc000 0x4000>;
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snvs_rtc: snvs-rtc-lp@34 {
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snvs_rtc: snvs-rtc-lp {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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regmap = <&snvs>;
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offset = <0x34>;
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interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
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<0 20 IRQ_TYPE_LEVEL_HIGH>;
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};
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snvs_poweroff: snvs-poweroff@38 {
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compatible = "fsl,sec-v4.0-poweroff";
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reg = <0x38 0x4>;
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snvs_poweroff: snvs-poweroff {
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compatible = "syscon-poweroff";
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regmap = <&snvs>;
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offset = <0x38>;
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mask = <0x60>;
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status = "disabled";
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};
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};
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@ -563,22 +563,23 @@
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fsl,anatop = <&anatop>;
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};
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snvs@020cc000 {
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compatible = "fsl,sec-v4.0-mon", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x020cc000 0x4000>;
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snvs: snvs@020cc000 {
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compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
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reg = <0x020cc000 0x4000>;
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snvs_rtc: snvs-rtc-lp@34 {
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snvs_rtc: snvs-rtc-lp {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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regmap = <&snvs>;
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offset = <0x34>;
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interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
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<0 20 IRQ_TYPE_LEVEL_HIGH>;
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};
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snvs_poweroff: snvs-poweroff@38 {
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compatible = "fsl,sec-v4.0-poweroff";
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reg = <0x38 0x4>;
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snvs_poweroff: snvs-poweroff {
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compatible = "syscon-poweroff";
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regmap = <&snvs>;
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offset = <0x38>;
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mask = <0x60>;
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status = "disabled";
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};
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};
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@ -663,20 +663,21 @@
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};
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snvs: snvs@020cc000 {
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compatible = "fsl,sec-v4.0-mon", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x020cc000 0x4000>;
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compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
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reg = <0x020cc000 0x4000>;
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snvs_rtc: snvs-rtc-lp@34 {
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snvs_rtc: snvs-rtc-lp {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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regmap = <&snvs>;
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offset = <0x34>;
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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};
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snvs_poweroff: snvs-poweroff@38 {
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compatible = "fsl,sec-v4.0-poweroff";
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reg = <0x38 0x4>;
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snvs_poweroff: snvs-poweroff {
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compatible = "syscon-poweroff";
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regmap = <&snvs>;
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offset = <0x38>;
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mask = <0x60>;
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status = "disabled";
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};
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@ -419,14 +419,13 @@
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};
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snvs0: snvs@400a7000 {
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compatible = "fsl,sec-v4.0-mon", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x400a7000 0x2000>;
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compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
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reg = <0x400a7000 0x2000>;
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snvsrtc: snvs-rtc-lp@34 {
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snvsrtc: snvs-rtc-lp {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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regmap = <&snvs0>;
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offset = <0x34>;
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interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_SNVS>;
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clock-names = "snvs-rtc";
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