microblaze: Remove nop after MSRCLR/SET, MTS, MFS instructions
We need to save instruction and the latest Microblaze shouldn't have any problem with it. Signed-off-by: Michal Simek <monstr@monstr.eu>
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Michal Simek
parent
0e41c90908
commit
958063e67b
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@ -49,138 +49,106 @@
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#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
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.macro clear_bip
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msrclr r0, MSR_BIP
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nop
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.endm
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.macro set_bip
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msrset r0, MSR_BIP
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nop
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.endm
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.macro clear_eip
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msrclr r0, MSR_EIP
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nop
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.endm
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.macro set_ee
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msrset r0, MSR_EE
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nop
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.endm
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.macro disable_irq
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msrclr r0, MSR_IE
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nop
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.endm
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.macro enable_irq
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msrset r0, MSR_IE
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nop
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.endm
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.macro set_ums
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msrset r0, MSR_UMS
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nop
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msrclr r0, MSR_VMS
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nop
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.endm
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.macro set_vms
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msrclr r0, MSR_UMS
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nop
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msrset r0, MSR_VMS
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nop
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.endm
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.macro clear_ums
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msrclr r0, MSR_UMS
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nop
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.endm
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.macro clear_vms_ums
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msrclr r0, MSR_VMS | MSR_UMS
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nop
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.endm
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#else
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.macro clear_bip
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mfs r11, rmsr
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nop
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andi r11, r11, ~MSR_BIP
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mts rmsr, r11
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nop
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.endm
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.macro set_bip
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mfs r11, rmsr
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nop
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ori r11, r11, MSR_BIP
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mts rmsr, r11
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nop
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.endm
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.macro clear_eip
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mfs r11, rmsr
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nop
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andi r11, r11, ~MSR_EIP
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mts rmsr, r11
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nop
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.endm
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.macro set_ee
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mfs r11, rmsr
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nop
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ori r11, r11, MSR_EE
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mts rmsr, r11
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nop
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.endm
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.macro disable_irq
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mfs r11, rmsr
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nop
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andi r11, r11, ~MSR_IE
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mts rmsr, r11
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nop
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.endm
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.macro enable_irq
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mfs r11, rmsr
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nop
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ori r11, r11, MSR_IE
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mts rmsr, r11
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nop
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.endm
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.macro set_ums
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mfs r11, rmsr
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nop
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ori r11, r11, MSR_VMS
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andni r11, r11, MSR_UMS
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mts rmsr, r11
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nop
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.endm
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.macro set_vms
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mfs r11, rmsr
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nop
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ori r11, r11, MSR_VMS
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andni r11, r11, MSR_UMS
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mts rmsr, r11
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nop
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.endm
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.macro clear_ums
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mfs r11, rmsr
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nop
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andni r11, r11, MSR_UMS
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mts rmsr,r11
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nop
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.endm
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.macro clear_vms_ums
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mfs r11, rmsr
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nop
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andni r11, r11, (MSR_VMS|MSR_UMS)
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mts rmsr,r11
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nop
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.endm
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#endif
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@ -233,13 +201,11 @@
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swi r30, r1, PTO+PT_R30; \
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swi r31, r1, PTO+PT_R31; /* Save current task reg */ \
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mfs r11, rmsr; /* save MSR */ \
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nop; \
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swi r11, r1, PTO+PT_MSR;
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#define RESTORE_REGS \
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lwi r11, r1, PTO+PT_MSR; \
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mts rmsr , r11; \
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nop; \
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lwi r2, r1, PTO+PT_R2; /* restore SDA */ \
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lwi r3, r1, PTO+PT_R3; \
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lwi r4, r1, PTO+PT_R4; \
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@ -273,7 +239,6 @@
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swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \
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/* See if already in kernel mode.*/ \
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mfs r1, rmsr; \
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nop; \
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andi r1, r1, MSR_UMS; \
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bnei r1, 1f; \
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/* Kernel-mode state save. */ \
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@ -518,11 +483,8 @@ C_ENTRY(full_exception_trap):
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/* where the trap should return need -8 to adjust for rtsd r15, 8 */
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addik r15, r0, ret_from_exc - 8
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mfs r6, resr
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nop
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mfs r7, rfsr; /* save FSR */
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nop
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mts rfsr, r0; /* Clear sticky fsr */
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nop
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rted r0, full_exception
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addik r5, r1, PTO /* parameter struct pt_regs * regs */
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@ -555,9 +517,7 @@ C_ENTRY(unaligned_data_trap):
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/* where the trap should return need -8 to adjust for rtsd r15, 8 */
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addik r15, r0, ret_from_exc-8
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mfs r3, resr /* ESR */
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nop
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mfs r4, rear /* EAR */
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nop
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rtbd r0, _unaligned_data_exception
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addik r7, r1, PTO /* parameter struct pt_regs * regs */
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@ -587,9 +547,7 @@ C_ENTRY(page_fault_data_trap):
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/* where the trap should return need -8 to adjust for rtsd r15, 8 */
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addik r15, r0, ret_from_exc-8
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mfs r6, rear /* parameter unsigned long address */
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nop
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mfs r7, resr /* parameter unsigned long error_code */
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nop
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rted r0, do_page_fault
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addik r5, r1, PTO /* parameter struct pt_regs * regs */
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@ -601,7 +559,6 @@ C_ENTRY(page_fault_instr_trap):
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/* where the trap should return need -8 to adjust for rtsd r15, 8 */
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addik r15, r0, ret_from_exc-8
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mfs r6, rear /* parameter unsigned long address */
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nop
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ori r7, r0, 0 /* parameter unsigned long error_code */
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rted r0, do_page_fault
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addik r5, r1, PTO /* parameter struct pt_regs * regs */
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@ -936,16 +893,12 @@ ENTRY(_switch_to)
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swi r30, r11, CC_R30
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/* special purpose registers */
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mfs r12, rmsr
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nop
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swi r12, r11, CC_MSR
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mfs r12, rear
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nop
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swi r12, r11, CC_EAR
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mfs r12, resr
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nop
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swi r12, r11, CC_ESR
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mfs r12, rfsr
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nop
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swi r12, r11, CC_FSR
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/* update r31, the current-give me pointer to task which will be next */
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@ -984,10 +937,8 @@ ENTRY(_switch_to)
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/* special purpose registers */
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lwi r12, r11, CC_FSR
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mts rfsr, r12
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nop
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lwi r12, r11, CC_MSR
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mts rmsr, r12
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nop
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rtsd r15, 8
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nop
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@ -997,10 +948,8 @@ ENTRY(_reset)
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ENTRY(_break)
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mfs r5, rmsr
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nop
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swi r5, r0, 0x250 + TOPHYS(r0_ram)
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mfs r5, resr
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nop
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swi r5, r0, 0x254 + TOPHYS(r0_ram)
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bri 0
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