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drm/amd/display: refactor vupdate interrupt registration 

We only need to register once OS calls the interrupt control.
Also, if we are entering static screen mode, disable after ramping is done.
Disable shall be done via timer of 2 seconds regardless of ramping
complete or not, just to simplify.

Also, ramp to mid instead of min, due to better flicker performance...

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Anthony Koo 2018-04-06 13:55:39 -04:00 committed by Alex Deucher
parent 9410a3776b
commit 953c2901c8
1 changed files with 8 additions and 11 deletions
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19
drivers/gpu/drm/amd/display/modules/freesync/freesync.c
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@ -109,12 +109,6 @@ static unsigned int calc_duration_in_us_from_v_total(
* 1000) * stream->timing.h_total,
stream->timing.pix_clk_khz));
if (duration_in_us < in_vrr->min_duration_in_us)
duration_in_us = in_vrr->min_duration_in_us;
if (duration_in_us > in_vrr->max_duration_in_us)
duration_in_us = in_vrr->max_duration_in_us;
return duration_in_us;
}
@ -230,10 +224,9 @@ static void update_v_total_for_static_ramp(
}
}
v_total = calc_v_total_from_duration(stream,
in_out_vrr,
current_duration_in_us);
v_total = div64_u64(div64_u64(((unsigned long long)(
current_duration_in_us) * stream->timing.pix_clk_khz),
stream->timing.h_total), 1000);
in_out_vrr->adjust.v_total_min = v_total;
in_out_vrr->adjust.v_total_max = v_total;
@ -702,7 +695,11 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
} else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
in_out_vrr->fixed.target_refresh_in_uhz =
in_out_vrr->min_refresh_in_uhz;
if (in_out_vrr->fixed.ramping_active) {
if (in_out_vrr->fixed.ramping_active &&
in_out_vrr->fixed.fixed_active) {
/* Do not update vtotals if ramping is already active
* in order to continue ramp from current refresh.
*/
in_out_vrr->fixed.fixed_active = true;
} else {
in_out_vrr->fixed.fixed_active = true;