mt76: check for pending reset before attempting to schedule tx
The check within mt76_txq_send_burst is not enough, as it happens after a first frame has already been queued up Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
parent
1d868b70e0
commit
95135e8c0b
|
@ -385,6 +385,10 @@ restart:
|
|||
bool empty = false;
|
||||
int cur;
|
||||
|
||||
if (test_bit(MT76_SCANNING, &dev->state) ||
|
||||
test_bit(MT76_RESET, &dev->state))
|
||||
return -EBUSY;
|
||||
|
||||
mtxq = list_first_entry(&hwq->swq, struct mt76_txq, list);
|
||||
if (mtxq->send_bar && mtxq->aggr) {
|
||||
struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
|
||||
|
|
Loading…
Reference in New Issue