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staging: octeon: move group number into rx group data 

Move group number into RX group data.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Aaro Koskinen 2016-08-31 23:57:42 +03:00 committed by Greg Kroah-Hartman
parent 9382cfe133
commit 942bab48e6
1 changed files with 11 additions and 9 deletions
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20
drivers/staging/octeon/ethernet-rx.c
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@ -45,6 +45,7 @@
static struct oct_rx_group { static struct oct_rx_group {
int irq; int irq;
int group;
struct napi_struct napi; struct napi_struct napi;
} oct_rx_group; } oct_rx_group;
@ -146,7 +147,7 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
return 0; return 0;
} }
static int cvm_oct_poll(int budget) static int cvm_oct_poll(struct oct_rx_group *rx_group, int budget)
{ {
const int coreid = cvmx_get_core_num(); const int coreid = cvmx_get_core_num();
u64 old_group_mask; u64 old_group_mask;
@ -168,13 +169,13 @@ static int cvm_oct_poll(int budget)
if (OCTEON_IS_MODEL(OCTEON_CN68XX)) { if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
old_group_mask = cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); old_group_mask = cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid));
cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid), cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid),
1ull << pow_receive_group); BIT(rx_group->group));
cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */ cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */
} else { } else {
old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid)); old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));
cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),
(old_group_mask & ~0xFFFFull) | (old_group_mask & ~0xFFFFull) |
1 << pow_receive_group); BIT(rx_group->group));
} }
if (USE_ASYNC_IOBDMA) { if (USE_ASYNC_IOBDMA) {
@ -199,15 +200,15 @@ static int cvm_oct_poll(int budget)
if (!work) { if (!work) {
if (OCTEON_IS_MODEL(OCTEON_CN68XX)) { if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
cvmx_write_csr(CVMX_SSO_WQ_IQ_DIS, cvmx_write_csr(CVMX_SSO_WQ_IQ_DIS,
1ull << pow_receive_group); BIT(rx_group->group));
cvmx_write_csr(CVMX_SSO_WQ_INT, cvmx_write_csr(CVMX_SSO_WQ_INT,
1ull << pow_receive_group); BIT(rx_group->group));
} else { } else {
union cvmx_pow_wq_int wq_int; union cvmx_pow_wq_int wq_int;
wq_int.u64 = 0; wq_int.u64 = 0;
wq_int.s.iq_dis = 1 << pow_receive_group; wq_int.s.iq_dis = BIT(rx_group->group);
wq_int.s.wq_int = 1 << pow_receive_group; wq_int.s.wq_int = BIT(rx_group->group);
cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64); cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64);
} }
break; break;
@ -422,7 +423,7 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
napi); napi);
int rx_count; int rx_count;
rx_count = cvm_oct_poll(budget); rx_count = cvm_oct_poll(rx_group, budget);
if (rx_count < budget) { if (rx_count < budget) {
/* No more work */ /* No more work */
@ -441,7 +442,7 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
*/ */
void cvm_oct_poll_controller(struct net_device *dev) void cvm_oct_poll_controller(struct net_device *dev)
{ {
cvm_oct_poll(16); cvm_oct_poll(&oct_rx_group, 16);
} }
#endif #endif
@ -465,6 +466,7 @@ void cvm_oct_rx_initialize(void)
napi_enable(&oct_rx_group.napi); napi_enable(&oct_rx_group.napi);
oct_rx_group.irq = OCTEON_IRQ_WORKQ0 + pow_receive_group; oct_rx_group.irq = OCTEON_IRQ_WORKQ0 + pow_receive_group;
oct_rx_group.group = pow_receive_group;
/* Register an IRQ handler to receive POW interrupts */ /* Register an IRQ handler to receive POW interrupts */
i = request_irq(oct_rx_group.irq, cvm_oct_do_interrupt, 0, "Ethernet", i = request_irq(oct_rx_group.irq, cvm_oct_do_interrupt, 0, "Ethernet",