gpio: elkhartlake: Introduce Intel Elkhart Lake PSE GPIO
This driver adds support for Intel Elkhart Lake PSE GPIO controller, using Intel Tangier as a library driver. Signed-off-by: Pandith N <pandith.n@intel.com> Co-developed-by: Raag Jadav <raag.jadav@intel.com> Signed-off-by: Raag Jadav <raag.jadav@intel.com> Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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@ -10281,6 +10281,7 @@ M: Andy Shevchenko <andy@kernel.org>
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L: linux-gpio@vger.kernel.org
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S: Supported
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git
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F: drivers/gpio/gpio-elkhartlake.c
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F: drivers/gpio/gpio-ich.c
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F: drivers/gpio/gpio-merrifield.c
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F: drivers/gpio/gpio-ml-ioh.c
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@ -625,6 +625,7 @@ config GPIO_TANGIER
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help
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GPIO support for Intel Tangier and compatible platforms.
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Currently supported:
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- Elkhart Lake
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- Merrifield
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If built as a module its name will be gpio-tangier.
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@ -1248,6 +1249,17 @@ config HTC_EGPIO
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several HTC phones. It provides basic support for input
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pins, output pins, and IRQs.
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config GPIO_ELKHARTLAKE
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tristate "Intel Elkhart Lake PSE GPIO support"
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depends on X86 || COMPILE_TEST
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select GPIO_TANGIER
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help
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Select this option to enable GPIO support for Intel Elkhart Lake
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PSE GPIO IP.
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To compile this driver as a module, choose M here: the module will
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be called gpio-elkhartlake.
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config GPIO_JANZ_TTL
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tristate "Janz VMOD-TTL Digital IO Module"
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depends on MFD_JANZ_CMODIO
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@ -54,6 +54,7 @@ obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o
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obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o
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obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o
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obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o
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obj-$(CONFIG_GPIO_ELKHARTLAKE) += gpio-elkhartlake.o
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obj-$(CONFIG_GPIO_EM) += gpio-em.o
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obj-$(CONFIG_GPIO_EN7523) += gpio-en7523.o
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obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
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@ -0,0 +1,90 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel Elkhart Lake PSE GPIO driver
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*
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* Copyright (c) 2023 Intel Corporation.
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*
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* Authors: Pandith N <pandith.n@intel.com>
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* Raag Jadav <raag.jadav@intel.com>
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include "gpio-tangier.h"
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/* Each Intel EHL PSE GPIO Controller has 30 GPIO pins */
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#define EHL_PSE_NGPIO 30
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static int ehl_gpio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct tng_gpio *priv;
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int irq, ret;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->reg_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->reg_base))
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return PTR_ERR(priv->reg_base);
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priv->dev = dev;
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priv->irq = irq;
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priv->info.base = -1;
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priv->info.ngpio = EHL_PSE_NGPIO;
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priv->wake_regs.gwmr = GWMR_EHL;
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priv->wake_regs.gwsr = GWSR_EHL;
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priv->wake_regs.gsir = GSIR_EHL;
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ret = devm_tng_gpio_probe(dev, priv);
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if (ret)
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return dev_err_probe(dev, ret, "tng_gpio_probe error\n");
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platform_set_drvdata(pdev, priv);
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return 0;
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}
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static int ehl_gpio_suspend(struct device *dev)
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{
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return tng_gpio_suspend(dev);
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}
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static int ehl_gpio_resume(struct device *dev)
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{
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return tng_gpio_resume(dev);
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}
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static DEFINE_SIMPLE_DEV_PM_OPS(ehl_gpio_pm_ops, ehl_gpio_suspend, ehl_gpio_resume);
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static const struct platform_device_id ehl_gpio_ids[] = {
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{ "gpio-elkhartlake" },
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{ }
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};
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MODULE_DEVICE_TABLE(platform, ehl_gpio_ids);
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static struct platform_driver ehl_gpio_driver = {
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.driver = {
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.name = "gpio-elkhartlake",
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.pm = pm_sleep_ptr(&ehl_gpio_pm_ops),
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},
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.probe = ehl_gpio_probe,
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.id_table = ehl_gpio_ids,
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};
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module_platform_driver(ehl_gpio_driver);
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MODULE_AUTHOR("Pandith N <pandith.n@intel.com>");
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MODULE_AUTHOR("Raag Jadav <raag.jadav@intel.com>");
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MODULE_DESCRIPTION("Intel Elkhart Lake PSE GPIO driver");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(GPIO_TANGIER);
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@ -20,6 +20,11 @@ struct device;
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struct tng_gpio_context;
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/* Elkhart Lake specific wake registers */
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#define GWMR_EHL 0x100 /* Wake mask */
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#define GWSR_EHL 0x118 /* Wake source */
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#define GSIR_EHL 0x130 /* Secure input */
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/* Merrifield specific wake registers */
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#define GWMR_MRFLD 0x400 /* Wake mask */
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#define GWSR_MRFLD 0x418 /* Wake source */
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