x86: coding style fixes in arch/x86/pci/fixup.c
Simple coding style fixes. no code changed: text data bss dec hex filename 3139 576 194 3909 f45 fixup.o.before 3139 576 194 3909 f45 fixup.o.after md5: 9a3467057478b2d99962bdd448282eeb fixup.o.before.asm 9a3467057478b2d99962bdd448282eeb fixup.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -19,7 +19,7 @@ static void __devinit pci_fixup_i450nx(struct pci_dev *d)
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printk(KERN_WARNING "PCI: Searching for i450NX host bridges on %s\n", pci_name(d));
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reg = 0xd0;
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for(pxb=0; pxb<2; pxb++) {
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for(pxb = 0; pxb < 2; pxb++) {
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pci_read_config_byte(d, reg++, &busno);
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pci_read_config_byte(d, reg++, &suba);
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pci_read_config_byte(d, reg++, &subb);
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@ -56,7 +56,7 @@ static void __devinit pci_fixup_umc_ide(struct pci_dev *d)
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int i;
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printk(KERN_WARNING "PCI: Fixing base address flags for device %s\n", pci_name(d));
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for(i=0; i<4; i++)
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for(i = 0; i < 4; i++)
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d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF, pci_fixup_umc_ide);
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@ -127,7 +127,7 @@ static void pci_fixup_via_northbridge_bug(struct pci_dev *d)
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NB latency to zero */
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pci_write_config_byte(d, PCI_LATENCY_TIMER, 0);
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where = 0x95; /* the memory write queue timer register is
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where = 0x95; /* the memory write queue timer register is
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different for the KT266x's: 0x95 not 0x55 */
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} else if (d->device == PCI_DEVICE_ID_VIA_8363_0 &&
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(d->revision == VIA_8363_KL133_REVISION_ID ||
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@ -230,7 +230,7 @@ static int quirk_pcie_aspm_write(struct pci_bus *bus, unsigned int devfn, int wh
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if ((offset) && (where == offset))
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value = value & 0xfffffffc;
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return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
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}
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@ -271,8 +271,8 @@ static void pcie_rootport_aspm_quirk(struct pci_dev *pdev)
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* after hot-remove, the pbus->devices is empty and this code
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* will set the offsets to zero and the bus ops to parent's bus
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* ops, which is unmodified.
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*/
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for (i= GET_INDEX(pdev->device, 0); i <= GET_INDEX(pdev->device, 7); ++i)
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*/
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for (i = GET_INDEX(pdev->device, 0); i <= GET_INDEX(pdev->device, 7); ++i)
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quirk_aspm_offset[i] = 0;
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pbus->ops = pbus->parent->ops;
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@ -286,17 +286,17 @@ static void pcie_rootport_aspm_quirk(struct pci_dev *pdev)
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list_for_each_entry(dev, &pbus->devices, bus_list) {
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/* There are 0 to 8 devices attached to this bus */
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cap_base = pci_find_capability(dev, PCI_CAP_ID_EXP);
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quirk_aspm_offset[GET_INDEX(pdev->device, dev->devfn)]= cap_base + 0x10;
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quirk_aspm_offset[GET_INDEX(pdev->device, dev->devfn)] = cap_base + 0x10;
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}
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pbus->ops = &quirk_pcie_aspm_ops;
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PA, pcie_rootport_aspm_quirk );
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PA1, pcie_rootport_aspm_quirk );
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PB, pcie_rootport_aspm_quirk );
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PB1, pcie_rootport_aspm_quirk );
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PC, pcie_rootport_aspm_quirk );
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PC1, pcie_rootport_aspm_quirk );
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PA, pcie_rootport_aspm_quirk);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PA1, pcie_rootport_aspm_quirk);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PB, pcie_rootport_aspm_quirk);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PB1, pcie_rootport_aspm_quirk);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PC, pcie_rootport_aspm_quirk);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PC1, pcie_rootport_aspm_quirk);
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/*
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* Fixup to mark boot BIOS video selected by BIOS before it changes
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@ -336,8 +336,8 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
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* PCI header type NORMAL.
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*/
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if (bridge
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&&((bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE)
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||(bridge->hdr_type == PCI_HEADER_TYPE_CARDBUS))) {
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&& ((bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE)
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|| (bridge->hdr_type == PCI_HEADER_TYPE_CARDBUS))) {
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pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
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&config);
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if (!(config & PCI_BRIDGE_CTL_VGA))
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