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Staging: rtl8192e: Clean up rtl8192_halt_adapter() 

Remove dead code, fix whitespace, clean comments

Signed-off-by: Mike McCormack <mikem@ring3k.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Mike McCormack 2010-09-24 18:39:09 +09:00 committed by Greg Kroah-Hartman
parent b72cb94f4a
commit 932f4b3aab
1 changed files with 20 additions and 33 deletions
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53
drivers/staging/rtl8192e/r8192E_core.c
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@ -902,60 +902,47 @@ void rtl8192_halt_adapter(struct net_device *dev, bool reset)
{ {
struct r8192_priv *priv = ieee80211_priv(dev); struct r8192_priv *priv = ieee80211_priv(dev);
int i; int i;
u8 OpMode; u8 OpMode;
u8 u1bTmp; u32 ulRegRead;
u32 ulRegRead;
OpMode = RT_OP_MODE_NO_LINK; OpMode = RT_OP_MODE_NO_LINK;
priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode); priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
if(!priv->ieee80211->bSupportRemoteWakeUp) if (!priv->ieee80211->bSupportRemoteWakeUp) {
{ /*
u1bTmp = 0x0; // disable tx/rx. In 8185 we write 0x10 (Reset bit), but here we make reference to WMAC and wirte 0x0. 2006.11.21 Emily * disable tx/rx. In 8185 we write 0x10 (Reset bit),
//priv->ieee80211->SetHwRegHandler(dev, HW_VAR_COMMAND, &u1bTmp ); // Using HW_VAR_COMMAND instead of writing CMDR directly. Rewrited by Annie, 2006-04-07. * but here we make reference to WMAC and wirte 0x0
write_nic_byte(dev, CMDR, u1bTmp); */
write_nic_byte(dev, CMDR, 0);
} }
mdelay(20); mdelay(20);
if(!reset) if (!reset) {
{
//PlatformStallExecution(150000);
mdelay(150); mdelay(150);
#ifdef RTL8192E #ifdef RTL8192E
priv->bHwRfOffAction = 2; priv->bHwRfOffAction = 2;
#endif #endif
// /*
// Call MgntActSet_RF_State instead to prevent RF config race condition. * Call MgntActSet_RF_State instead to
// By Bruce, 2008-01-17. * prevent RF config race condition.
// */
if(!priv->ieee80211->bSupportRemoteWakeUp) if (!priv->ieee80211->bSupportRemoteWakeUp) {
{
//MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_INIT);
//MgntActSet_RF_State(Adapter, eRfOff, Adapter->MgntInfo.RfOffReason);
//if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P)
PHY_SetRtl8192eRfOff(dev); PHY_SetRtl8192eRfOff(dev);
// 2006.11.30. System reset bit
//priv->ieee80211->GetHwRegHandler(dev, HW_VAR_CPU_RST, (u32*)(&ulRegRead) );
ulRegRead = read_nic_dword(dev,CPU_GEN); ulRegRead = read_nic_dword(dev,CPU_GEN);
ulRegRead|=CPU_GEN_SYSTEM_RESET; ulRegRead |= CPU_GEN_SYSTEM_RESET;
//priv->ieee80211->SetHwRegHandler(dev, HW_VAR_CPU_RST, &ulRegRead);
write_nic_dword(dev,CPU_GEN, ulRegRead); write_nic_dword(dev,CPU_GEN, ulRegRead);
} } else {
else /* for WOL */
{
//2008.06.03 for WOL
write_nic_dword(dev, WFCRC0, 0xffffffff); write_nic_dword(dev, WFCRC0, 0xffffffff);
write_nic_dword(dev, WFCRC1, 0xffffffff); write_nic_dword(dev, WFCRC1, 0xffffffff);
write_nic_dword(dev, WFCRC2, 0xffffffff); write_nic_dword(dev, WFCRC2, 0xffffffff);
//Write PMR register /* Write PMR register */
write_nic_byte(dev, PMR, 0x5); write_nic_byte(dev, PMR, 0x5);
//Disable tx, enanble rx /* Disable tx, enanble rx */
write_nic_byte(dev, MacBlkCtrl, 0xa); write_nic_byte(dev, MacBlkCtrl, 0xa);
} }
} }