arm64: dts: lx2160a: Add flexcan support
LX2160A supports two flexcan controllers. Add the support. Enable support further for LX2160A-RDB/QDS. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -33,6 +33,14 @@
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};
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&crypto {
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status = "okay";
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};
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@ -89,6 +89,22 @@
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};
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};
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&can0 {
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status = "okay";
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can-transceiver {
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max-bitrate = <5000000>;
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};
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};
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&can1 {
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status = "okay";
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can-transceiver {
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max-bitrate = <5000000>;
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};
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};
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&esdhc0 {
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sd-uhs-sdr104;
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sd-uhs-sdr50;
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@ -895,6 +895,30 @@
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status = "disabled";
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};
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can0: can@2180000 {
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compatible = "fsl,lx2160ar1-flexcan";
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reg = <0x0 0x2180000 0x0 0x10000>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(8)>,
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<&clockgen QORIQ_CLK_SYSCLK 0>;
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clock-names = "ipg", "per";
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fsl,clk-source = <0>;
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status = "disabled";
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};
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can1: can@2190000 {
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compatible = "fsl,lx2160ar1-flexcan";
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reg = <0x0 0x2190000 0x0 0x10000>;
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interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(8)>,
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<&clockgen QORIQ_CLK_SYSCLK 0>;
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clock-names = "ipg", "per";
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fsl,clk-source = <0>;
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status = "disabled";
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};
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uart0: serial@21c0000 {
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compatible = "arm,sbsa-uart","arm,pl011";
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reg = <0x0 0x21c0000 0x0 0x1000>;
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