arm64: dts: lx2160a: Add flexcan support

LX2160A supports two flexcan controllers. Add the support.
Enable support further for LX2160A-RDB/QDS.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Kuldeep Singh 2021-01-21 16:27:37 +05:30 committed by Shawn Guo
parent 42c2c06883
commit 930a0968c6
3 changed files with 48 additions and 0 deletions

View File

@ -33,6 +33,14 @@
};
};
&can0 {
status = "okay";
};
&can1 {
status = "okay";
};
&crypto {
status = "okay";
};

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@ -89,6 +89,22 @@
};
};
&can0 {
status = "okay";
can-transceiver {
max-bitrate = <5000000>;
};
};
&can1 {
status = "okay";
can-transceiver {
max-bitrate = <5000000>;
};
};
&esdhc0 {
sd-uhs-sdr104;
sd-uhs-sdr50;

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@ -895,6 +895,30 @@
status = "disabled";
};
can0: can@2180000 {
compatible = "fsl,lx2160ar1-flexcan";
reg = <0x0 0x2180000 0x0 0x10000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(8)>,
<&clockgen QORIQ_CLK_SYSCLK 0>;
clock-names = "ipg", "per";
fsl,clk-source = <0>;
status = "disabled";
};
can1: can@2190000 {
compatible = "fsl,lx2160ar1-flexcan";
reg = <0x0 0x2190000 0x0 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(8)>,
<&clockgen QORIQ_CLK_SYSCLK 0>;
clock-names = "ipg", "per";
fsl,clk-source = <0>;
status = "disabled";
};
uart0: serial@21c0000 {
compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21c0000 0x0 0x1000>;