[S390] Fix disassembly of RX_URRD, SI_URD & PC-relative instructions.
The instructions with format RX_URRD and SI_URD and instructions with a PC relative operand are not disassembled correctly. For RX_URRD and SI_URD instructions find_insn sets opfrag to code[0]. The mask byte of these two formats is 0x00. table->opfrag will never be identical to (opfrag & opmask) and no matching instruction will be found. Set the mask byte to 0xff to actually check byte 0 against the table. For PC relative instructions the (unsigned) offset value needs to be casted to an signed integer so that negative branch offsets are handled correctly. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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@ -240,8 +240,8 @@ static const unsigned char formats[][7] = {
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[INSTR_RXY_FRRD] = { 0xff, F_8,D20_20,X_12,B_16,0,0 },/* e.g. ley */
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[INSTR_RX_FRRD] = { 0xff, F_8,D_20,X_12,B_16,0,0 }, /* e.g. ae */
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[INSTR_RX_RRRD] = { 0xff, R_8,D_20,X_12,B_16,0,0 }, /* e.g. l */
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[INSTR_RX_URRD] = { 0x00, U4_8,D_20,X_12,B_16,0,0 }, /* e.g. bc */
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[INSTR_SI_URD] = { 0x00, D_20,B_16,U8_8,0,0,0 }, /* e.g. cli */
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[INSTR_RX_URRD] = { 0xff, U4_8,D_20,X_12,B_16,0,0 }, /* e.g. bc */
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[INSTR_SI_URD] = { 0xff, D_20,B_16,U8_8,0,0,0 }, /* e.g. cli */
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[INSTR_SIY_URD] = { 0xff, D20_20,B_16,U8_8,0,0,0 }, /* e.g. tmy */
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[INSTR_SSE_RDRD] = { 0xff, D_20,B_16,D_36,B_32,0,0 }, /* e.g. mvsdk */
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[INSTR_SS_L0RDRD] = { 0xff, D_20,L8_8,B_16,D_36,B_32,0 },
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@ -1190,7 +1190,8 @@ static int print_insn(char *buffer, unsigned char *code, unsigned long addr)
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else if (operand->flags & OPERAND_CR)
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ptr += sprintf(ptr, "%%c%i", value);
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else if (operand->flags & OPERAND_PCREL)
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ptr += sprintf(ptr, "%lx", value + addr);
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ptr += sprintf(ptr, "%lx", (signed int) value
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+ addr);
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else if (operand->flags & OPERAND_SIGNED)
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ptr += sprintf(ptr, "%i", value);
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else
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