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PCI: mobiveil: Fix sparse different address space warnings 

Fix the sparse warnings below:

drivers/pci/controller/mobiveil/pcie-mobiveil.c:44:49: warning: incorrect type in return expression (different address spaces)
drivers/pci/controller/mobiveil/pcie-mobiveil.c:44:49:    expected void *
drivers/pci/controller/mobiveil/pcie-mobiveil.c:44:49:    got void [noderef] <asn:2> *
drivers/pci/controller/mobiveil/pcie-mobiveil.c:48:41: warning: incorrect type in return expression (different address spaces)
drivers/pci/controller/mobiveil/pcie-mobiveil.c:48:41:    expected void *
drivers/pci/controller/mobiveil/pcie-mobiveil.c:48:41:    got void [noderef] <asn:2> *
drivers/pci/controller/mobiveil/pcie-mobiveil.c:106:34: warning: incorrect type in argument 1 (different address spaces)
drivers/pci/controller/mobiveil/pcie-mobiveil.c:106:34:    expected void [noderef] <asn:2> *addr
drivers/pci/controller/mobiveil/pcie-mobiveil.c:106:34:    got void *[assigned] addr
drivers/pci/controller/mobiveil/pcie-mobiveil.c:121:35: warning: incorrect type in argument 1 (different address spaces)
drivers/pci/controller/mobiveil/pcie-mobiveil.c:121:35:    expected void [noderef] <asn:2> *addr
drivers/pci/controller/mobiveil/pcie-mobiveil.c:121:35:    got void *[assigned] addr

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reported-by: kbuild test robot <lkp@intel.com>
This commit is contained in:
Hou Zhiqiang 2020-03-17 22:51:25 +08:00 committed by Lorenzo Pieralisi
parent d29ad70a81
commit 92a17e5c79
1 changed files with 4 additions and 3 deletions
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7
drivers/pci/controller/mobiveil/pcie-mobiveil.c
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@ -36,7 +36,8 @@ static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx)
writel(val, pcie->csr_axi_slave_base + PAB_CTRL);
}
static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, u32 off)
static void __iomem *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie,
u32 off)
{
if (off < PAGED_ADDR_BNDRY) {
/* For directly accessed registers, clear the pg_sel field */
@ -97,7 +98,7 @@ static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val)
u32 mobiveil_csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size)
{
void *addr;
void __iomem *addr;
u32 val;
int ret;
@ -113,7 +114,7 @@ u32 mobiveil_csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size)
void mobiveil_csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off,
size_t size)
{
void *addr;
void __iomem *addr;
int ret;
addr = mobiveil_pcie_comp_addr(pcie, off);