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drm/i915/tgl: Move transcoders to pipes' powerwells 

When trying to read registers from transcoder C and D while PG3 is ON it
causes unclaimed access warnings. Adding the powerwells for the pipes
fixes the issue, but doesn't match the spec.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190817093902.2171-4-lucas.demarchi@intel.com
This commit is contained in:
José Roberto de Souza 2019-08-17 02:38:25 -07:00 committed by Lucas De Marchi
parent 465242ee36
commit 9288d74f3f
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/display/intel_display_power.c
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@ -2549,12 +2549,14 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
#define TGL_PW_5_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_PIPE_D) | \
BIT_ULL(POWER_DOMAIN_TRANSCODER_D) | \
BIT_ULL(POWER_DOMAIN_PIPE_D_PANEL_FITTER) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define TGL_PW_4_POWER_DOMAINS ( \
TGL_PW_5_POWER_DOMAINS | \
BIT_ULL(POWER_DOMAIN_PIPE_C) | \
BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \
BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \
BIT_ULL(POWER_DOMAIN_INIT))
@ -2562,8 +2564,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
TGL_PW_4_POWER_DOMAINS | \
BIT_ULL(POWER_DOMAIN_PIPE_B) | \
BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \
BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \
BIT_ULL(POWER_DOMAIN_TRANSCODER_D) | \
BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \
BIT_ULL(POWER_DOMAIN_PORT_DDI_TC1_LANES) | \
BIT_ULL(POWER_DOMAIN_PORT_DDI_TC2_LANES) | \