clk: zynq: Leave debug clocks in bootup state
Make sure debug clocks stay enabled if the bootloader enabled them. Otherwise debug HW may crash due to bus-hangs caused by stopped clocks. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -53,6 +53,9 @@ static void __iomem *zynq_clkc_base;
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#define NUM_MIO_PINS 54
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#define DBG_CLK_CTRL_CLKACT_TRC BIT(0)
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#define DBG_CLK_CTRL_CPU_1XCLKACT BIT(1)
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enum zynq_clk {
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armpll, ddrpll, iopll,
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cpu_6or4x, cpu_3or2x, cpu_2x, cpu_1x,
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@ -499,6 +502,15 @@ static void __init zynq_clk_setup(struct device_node *np)
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clk_output_name[cpu_1x], 0, SLCR_DBG_CLK_CTRL, 1, 0,
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&dbgclk_lock);
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/* leave debug clocks in the state the bootloader set them up to */
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tmp = clk_readl(SLCR_DBG_CLK_CTRL);
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if (tmp & DBG_CLK_CTRL_CLKACT_TRC)
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if (clk_prepare_enable(clks[dbg_trc]))
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pr_warn("%s: trace clk enable failed\n", __func__);
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if (tmp & DBG_CLK_CTRL_CPU_1XCLKACT)
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if (clk_prepare_enable(clks[dbg_apb]))
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pr_warn("%s: debug APB clk enable failed\n", __func__);
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/* One gated clock for all APER clocks. */
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clks[dma] = clk_register_gate(NULL, clk_output_name[dma],
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clk_output_name[cpu_2x], 0, SLCR_APER_CLK_CTRL, 0, 0,
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