drm/nv40/pm: implement first type of pwm fanspeed funcs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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0c101461e2
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9232969e19
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@ -56,6 +56,8 @@ void nv04_pm_clock_set(struct drm_device *, void *);
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int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
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void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
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void nv40_pm_clocks_set(struct drm_device *, void *);
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int nv40_pm_fanspeed_get(struct drm_device *);
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int nv40_pm_fanspeed_set(struct drm_device *, int percent);
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/* nv50_pm.c */
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int nv50_pm_clock_get(struct drm_device *, u32 id);
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@ -292,6 +292,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
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engine->pm.voltage_get = nouveau_voltage_gpio_get;
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engine->pm.voltage_set = nouveau_voltage_gpio_set;
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engine->pm.temp_get = nv40_temp_get;
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switch (dev_priv->chipset) {
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case 0x40:
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case 0x49:
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engine->pm.fanspeed_get = nv40_pm_fanspeed_get;
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engine->pm.fanspeed_set = nv40_pm_fanspeed_set;
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break;
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default:
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break;
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}
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engine->vram.init = nouveau_mem_detect;
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engine->vram.takedown = nouveau_stub_takedown;
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engine->vram.flags_valid = nouveau_mem_flags_valid;
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@ -346,3 +346,29 @@ resume:
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kfree(info);
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}
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int
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nv40_pm_fanspeed_get(struct drm_device *dev)
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{
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u32 reg = nv_rd32(dev, 0x0010f0);
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if (reg & 0x80000000) {
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u32 duty = (reg & 0x7fff0000) >> 16;
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u32 divs = (reg & 0x00007fff);
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if (divs && divs >= duty)
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return ((divs - duty) * 100) / divs;
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}
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return 100;
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}
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int
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nv40_pm_fanspeed_set(struct drm_device *dev, int percent)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
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u32 divs = pm->pwm_divisor;
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u32 duty = ((100 - percent) * divs) / 100;
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nv_wr32(dev, 0x0010f0, 0x80000000 | (duty << 16) | divs);
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return 0;
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}
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