staging: brcm80211: remove redundant CHIPTYPE macro
The CHIPTYPE macro simply expands to the macro argument so it is redundant and as such removed. Reviewed-by: Roland Vossen <rvossen@broadcom.com> Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -51,7 +51,6 @@
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#define SPI_BUS 6 /* gSPI target */
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#define RPC_BUS 7 /* RPC target */
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#define CHIPTYPE(bus) (bus)
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#define CHIPID(chip) (chip)
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#define CHIPREV(rev) (rev)
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@ -568,7 +568,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
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sih->issim = IS_SIM(sih->chippkg);
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/* scan for cores */
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if (CHIPTYPE(sii->pub.socitype) == SOCI_AI) {
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if (sii->pub.socitype == SOCI_AI) {
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SI_MSG(("Found chip type AI (0x%08x)\n", w));
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/* pass chipc address instead of original core base */
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ai_scan(&sii->pub, (void *)cc, devid);
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@ -765,7 +765,7 @@ void si_deregister_intr_callback(si_t *sih)
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uint si_flag(si_t *sih)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_flag(sih);
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else {
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ASSERT(0);
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@ -775,7 +775,7 @@ uint si_flag(si_t *sih)
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void si_setint(si_t *sih, int siflag)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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ai_setint(sih, siflag);
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else
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ASSERT(0);
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@ -807,7 +807,7 @@ bool si_backplane64(si_t *sih)
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#ifndef BCMSDIO
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uint si_corerev(si_t *sih)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_corerev(sih);
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else {
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ASSERT(0);
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@ -850,7 +850,7 @@ void *si_setcore(si_t *sih, uint coreid, uint coreunit)
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if (!GOODIDX(idx))
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return NULL;
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_setcoreidx(sih, idx);
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else {
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#ifdef BCMSDIO
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@ -865,7 +865,7 @@ void *si_setcore(si_t *sih, uint coreid, uint coreunit)
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#ifndef BCMSDIO
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void *si_setcoreidx(si_t *sih, uint coreidx)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_setcoreidx(sih, coreidx);
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else {
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ASSERT(0);
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@ -917,7 +917,7 @@ void si_restore_core(si_t *sih, uint coreid, uint intr_val)
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u32 si_core_cflags(si_t *sih, u32 mask, u32 val)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_core_cflags(sih, mask, val);
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else {
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ASSERT(0);
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@ -927,7 +927,7 @@ u32 si_core_cflags(si_t *sih, u32 mask, u32 val)
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u32 si_core_sflags(si_t *sih, u32 mask, u32 val)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_core_sflags(sih, mask, val);
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else {
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ASSERT(0);
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@ -937,7 +937,7 @@ u32 si_core_sflags(si_t *sih, u32 mask, u32 val)
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bool si_iscoreup(si_t *sih)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_iscoreup(sih);
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else {
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#ifdef BCMSDIO
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@ -952,7 +952,7 @@ bool si_iscoreup(si_t *sih)
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void si_write_wrapperreg(si_t *sih, u32 offset, u32 val)
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{
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/* only for 4319, no requirement for SOCI_SB */
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if (CHIPTYPE(sih->socitype) == SOCI_AI) {
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if (sih->socitype == SOCI_AI) {
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ai_write_wrap_reg(sih, offset, val);
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}
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}
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@ -960,7 +960,7 @@ void si_write_wrapperreg(si_t *sih, u32 offset, u32 val)
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uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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return ai_corereg(sih, coreidx, regoff, mask, val);
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else {
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#ifdef BCMSDIO
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@ -975,7 +975,7 @@ uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
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void si_core_disable(si_t *sih, u32 bits)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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ai_core_disable(sih, bits);
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#ifdef BCMSDIO
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else
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@ -985,7 +985,7 @@ void si_core_disable(si_t *sih, u32 bits)
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void si_core_reset(si_t *sih, u32 bits, u32 resetbits)
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{
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if (CHIPTYPE(sih->socitype) == SOCI_AI)
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if (sih->socitype == SOCI_AI)
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ai_core_reset(sih, bits, resetbits);
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#ifdef BCMSDIO
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else
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