drm/radeon: update radeon_atom_get_clock_dividers for CIK
CIK uses a slightly different variant of the table structs and params. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2700,6 +2700,8 @@ union get_clock_dividers {
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struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 v3;
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struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 v4;
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struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 v5;
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struct _COMPUTE_GPU_CLOCK_INPUT_PARAMETERS_V1_6 v6_in;
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struct _COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_6 v6_out;
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};
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int radeon_atom_get_clock_dividers(struct radeon_device *rdev,
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@ -2794,9 +2796,25 @@ int radeon_atom_get_clock_dividers(struct radeon_device *rdev,
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atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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dividers->post_div = args.v4.ucPostDiv;
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dividers->post_divider = dividers->post_div = args.v4.ucPostDiv;
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dividers->real_clock = le32_to_cpu(args.v4.ulClock);
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break;
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case 6:
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/* CI */
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/* COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK, COMPUTE_GPUCLK_INPUT_FLAG_SCLK */
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args.v6_in.ulClock.ulComputeClockFlag = clock_type;
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args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
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atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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dividers->whole_fb_div = le16_to_cpu(args.v6_out.ulFbDiv.usFbDiv);
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dividers->frac_fb_div = le16_to_cpu(args.v6_out.ulFbDiv.usFbDivFrac);
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dividers->ref_div = args.v6_out.ucPllRefDiv;
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dividers->post_div = args.v6_out.ucPllPostDiv;
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dividers->flags = args.v6_out.ucPllCntlFlag;
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dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock);
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dividers->post_divider = args.v6_out.ulClock.ucPostDiv;
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break;
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default:
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return -EINVAL;
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}
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@ -514,6 +514,9 @@ struct atom_clock_dividers {
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bool enable_dithen;
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u32 vco_mode;
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u32 real_clock;
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/* added for CI */
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u32 post_divider;
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u32 flags;
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};
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extern enum radeon_tv_std
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