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pinctrl: sh-pfc: r8a7796: Add R8A774A1 PFC support 

Renesas RZ/G2M (r8a774a1) is pin compatible with R-Car M3-W (r8a7796),
however it doesn't have several automotive specific peripherals. Add
an r8a7796 specific pin groups/functions along with common pin
groups/functions for supporting both r8a7796 and r8a774a1 SoCs.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2018-08-13 14:52:32 +01:00 committed by Geert Uytterhoeven
parent 8f9a1acd8c
commit 91d627a779
5 changed files with 455 additions and 399 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/pinctrl/sh-pfc/Kconfig
View File

@ -49,6 +49,11 @@ config PINCTRL_PFC_R8A77470
depends on ARCH_R8A77470 depends on ARCH_R8A77470
select PINCTRL_SH_PFC select PINCTRL_SH_PFC
config PINCTRL_PFC_R8A774A1
def_bool y
depends on ARCH_R8A774A1
select PINCTRL_SH_PFC
config PINCTRL_PFC_R8A7778 config PINCTRL_PFC_R8A7778
def_bool y def_bool y
depends on ARCH_R8A7778 depends on ARCH_R8A7778

1
drivers/pinctrl/sh-pfc/Makefile
View File

@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o
obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o
obj-$(CONFIG_PINCTRL_PFC_R8A77470) += pfc-r8a77470.o obj-$(CONFIG_PINCTRL_PFC_R8A77470) += pfc-r8a77470.o
obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A7778) += pfc-r8a7778.o obj-$(CONFIG_PINCTRL_PFC_R8A7778) += pfc-r8a7778.o
obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o
obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o

6
drivers/pinctrl/sh-pfc/core.c
View File

@ -509,6 +509,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
.data = &r8a77470_pinmux_info, .data = &r8a77470_pinmux_info,
}, },
#endif #endif
#ifdef CONFIG_PINCTRL_PFC_R8A774A1
{
.compatible = "renesas,pfc-r8a774a1",
.data = &r8a774a1_pinmux_info,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A7778 #ifdef CONFIG_PINCTRL_PFC_R8A7778
{ {
.compatible = "renesas,pfc-r8a7778", .compatible = "renesas,pfc-r8a7778",

841
drivers/pinctrl/sh-pfc/pfc-r8a7796.c
View File

@ -4126,347 +4126,354 @@ static const unsigned int vin5_clk_mux[] = {
VI5_CLK_MARK, VI5_CLK_MARK,
}; };
static const struct sh_pfc_pin_group pinmux_groups[] = { static const struct {
SH_PFC_PIN_GROUP(audio_clk_a_a), struct sh_pfc_pin_group common[307];
SH_PFC_PIN_GROUP(audio_clk_a_b), struct sh_pfc_pin_group r8a779x[33];
SH_PFC_PIN_GROUP(audio_clk_a_c), } pinmux_groups = {
SH_PFC_PIN_GROUP(audio_clk_b_a), .common = {
SH_PFC_PIN_GROUP(audio_clk_b_b), SH_PFC_PIN_GROUP(audio_clk_a_a),
SH_PFC_PIN_GROUP(audio_clk_c_a), SH_PFC_PIN_GROUP(audio_clk_a_b),
SH_PFC_PIN_GROUP(audio_clk_c_b), SH_PFC_PIN_GROUP(audio_clk_a_c),
SH_PFC_PIN_GROUP(audio_clkout_a), SH_PFC_PIN_GROUP(audio_clk_b_a),
SH_PFC_PIN_GROUP(audio_clkout_b), SH_PFC_PIN_GROUP(audio_clk_b_b),
SH_PFC_PIN_GROUP(audio_clkout_c), SH_PFC_PIN_GROUP(audio_clk_c_a),
SH_PFC_PIN_GROUP(audio_clkout_d), SH_PFC_PIN_GROUP(audio_clk_c_b),
SH_PFC_PIN_GROUP(audio_clkout1_a), SH_PFC_PIN_GROUP(audio_clkout_a),
SH_PFC_PIN_GROUP(audio_clkout1_b), SH_PFC_PIN_GROUP(audio_clkout_b),
SH_PFC_PIN_GROUP(audio_clkout2_a), SH_PFC_PIN_GROUP(audio_clkout_c),
SH_PFC_PIN_GROUP(audio_clkout2_b), SH_PFC_PIN_GROUP(audio_clkout_d),
SH_PFC_PIN_GROUP(audio_clkout3_a), SH_PFC_PIN_GROUP(audio_clkout1_a),
SH_PFC_PIN_GROUP(audio_clkout3_b), SH_PFC_PIN_GROUP(audio_clkout1_b),
SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(audio_clkout2_a),
SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(audio_clkout2_b),
SH_PFC_PIN_GROUP(avb_phy_int), SH_PFC_PIN_GROUP(audio_clkout3_a),
SH_PFC_PIN_GROUP_ALIAS(avb_mdc, avb_mdio), /* Deprecated */ SH_PFC_PIN_GROUP(audio_clkout3_b),
SH_PFC_PIN_GROUP(avb_mdio), SH_PFC_PIN_GROUP(avb_link),
SH_PFC_PIN_GROUP(avb_mii), SH_PFC_PIN_GROUP(avb_magic),
SH_PFC_PIN_GROUP(avb_avtp_pps), SH_PFC_PIN_GROUP(avb_phy_int),
SH_PFC_PIN_GROUP(avb_avtp_match_a), SH_PFC_PIN_GROUP_ALIAS(avb_mdc, avb_mdio), /* Deprecated */
SH_PFC_PIN_GROUP(avb_avtp_capture_a), SH_PFC_PIN_GROUP(avb_mdio),
SH_PFC_PIN_GROUP(avb_avtp_match_b), SH_PFC_PIN_GROUP(avb_mii),
SH_PFC_PIN_GROUP(avb_avtp_capture_b), SH_PFC_PIN_GROUP(avb_avtp_pps),
SH_PFC_PIN_GROUP(can0_data_a), SH_PFC_PIN_GROUP(avb_avtp_match_a),
SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(avb_avtp_capture_a),
SH_PFC_PIN_GROUP(can1_data), SH_PFC_PIN_GROUP(avb_avtp_match_b),
SH_PFC_PIN_GROUP(can_clk), SH_PFC_PIN_GROUP(avb_avtp_capture_b),
SH_PFC_PIN_GROUP(canfd0_data_a), SH_PFC_PIN_GROUP(can0_data_a),
SH_PFC_PIN_GROUP(canfd0_data_b), SH_PFC_PIN_GROUP(can0_data_b),
SH_PFC_PIN_GROUP(canfd1_data), SH_PFC_PIN_GROUP(can1_data),
SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(can_clk),
SH_PFC_PIN_GROUP(drif0_data0_a), SH_PFC_PIN_GROUP(du_rgb666),
SH_PFC_PIN_GROUP(drif0_data1_a), SH_PFC_PIN_GROUP(du_rgb888),
SH_PFC_PIN_GROUP(drif0_ctrl_b), SH_PFC_PIN_GROUP(du_clk_out_0),
SH_PFC_PIN_GROUP(drif0_data0_b), SH_PFC_PIN_GROUP(du_clk_out_1),
SH_PFC_PIN_GROUP(drif0_data1_b), SH_PFC_PIN_GROUP(du_sync),
SH_PFC_PIN_GROUP(drif0_ctrl_c), SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(drif0_data0_c), SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(drif0_data1_c), SH_PFC_PIN_GROUP(du_disp),
SH_PFC_PIN_GROUP(drif1_ctrl_a), SH_PFC_PIN_GROUP(hdmi0_cec),
SH_PFC_PIN_GROUP(drif1_data0_a), SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(drif1_data1_a), SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(drif1_ctrl_b), SH_PFC_PIN_GROUP(hscif0_ctrl),
SH_PFC_PIN_GROUP(drif1_data0_b), SH_PFC_PIN_GROUP(hscif1_data_a),
SH_PFC_PIN_GROUP(drif1_data1_b), SH_PFC_PIN_GROUP(hscif1_clk_a),
SH_PFC_PIN_GROUP(drif1_ctrl_c), SH_PFC_PIN_GROUP(hscif1_ctrl_a),
SH_PFC_PIN_GROUP(drif1_data0_c), SH_PFC_PIN_GROUP(hscif1_data_b),
SH_PFC_PIN_GROUP(drif1_data1_c), SH_PFC_PIN_GROUP(hscif1_clk_b),
SH_PFC_PIN_GROUP(drif2_ctrl_a), SH_PFC_PIN_GROUP(hscif1_ctrl_b),
SH_PFC_PIN_GROUP(drif2_data0_a), SH_PFC_PIN_GROUP(hscif2_data_a),
SH_PFC_PIN_GROUP(drif2_data1_a), SH_PFC_PIN_GROUP(hscif2_clk_a),
SH_PFC_PIN_GROUP(drif2_ctrl_b), SH_PFC_PIN_GROUP(hscif2_ctrl_a),
SH_PFC_PIN_GROUP(drif2_data0_b), SH_PFC_PIN_GROUP(hscif2_data_b),
SH_PFC_PIN_GROUP(drif2_data1_b), SH_PFC_PIN_GROUP(hscif2_clk_b),
SH_PFC_PIN_GROUP(drif3_ctrl_a), SH_PFC_PIN_GROUP(hscif2_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_a), SH_PFC_PIN_GROUP(hscif2_data_c),
SH_PFC_PIN_GROUP(drif3_data1_a), SH_PFC_PIN_GROUP(hscif2_clk_c),
SH_PFC_PIN_GROUP(drif3_ctrl_b), SH_PFC_PIN_GROUP(hscif2_ctrl_c),
SH_PFC_PIN_GROUP(drif3_data0_b), SH_PFC_PIN_GROUP(hscif3_data_a),
SH_PFC_PIN_GROUP(drif3_data1_b), SH_PFC_PIN_GROUP(hscif3_clk),
SH_PFC_PIN_GROUP(du_rgb666), SH_PFC_PIN_GROUP(hscif3_ctrl),
SH_PFC_PIN_GROUP(du_rgb888), SH_PFC_PIN_GROUP(hscif3_data_b),
SH_PFC_PIN_GROUP(du_clk_out_0), SH_PFC_PIN_GROUP(hscif3_data_c),
SH_PFC_PIN_GROUP(du_clk_out_1), SH_PFC_PIN_GROUP(hscif3_data_d),
SH_PFC_PIN_GROUP(du_sync), SH_PFC_PIN_GROUP(hscif4_data_a),
SH_PFC_PIN_GROUP(du_oddf), SH_PFC_PIN_GROUP(hscif4_clk),
SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(hscif4_ctrl),
SH_PFC_PIN_GROUP(du_disp), SH_PFC_PIN_GROUP(hscif4_data_b),
SH_PFC_PIN_GROUP(hdmi0_cec), SH_PFC_PIN_GROUP(i2c1_a),
SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(i2c1_b),
SH_PFC_PIN_GROUP(hscif0_clk), SH_PFC_PIN_GROUP(i2c2_a),
SH_PFC_PIN_GROUP(hscif0_ctrl), SH_PFC_PIN_GROUP(i2c2_b),
SH_PFC_PIN_GROUP(hscif1_data_a), SH_PFC_PIN_GROUP(i2c6_a),
SH_PFC_PIN_GROUP(hscif1_clk_a), SH_PFC_PIN_GROUP(i2c6_b),
SH_PFC_PIN_GROUP(hscif1_ctrl_a), SH_PFC_PIN_GROUP(i2c6_c),
SH_PFC_PIN_GROUP(hscif1_data_b), SH_PFC_PIN_GROUP(intc_ex_irq0),
SH_PFC_PIN_GROUP(hscif1_clk_b), SH_PFC_PIN_GROUP(intc_ex_irq1),
SH_PFC_PIN_GROUP(hscif1_ctrl_b), SH_PFC_PIN_GROUP(intc_ex_irq2),
SH_PFC_PIN_GROUP(hscif2_data_a), SH_PFC_PIN_GROUP(intc_ex_irq3),
SH_PFC_PIN_GROUP(hscif2_clk_a), SH_PFC_PIN_GROUP(intc_ex_irq4),
SH_PFC_PIN_GROUP(hscif2_ctrl_a), SH_PFC_PIN_GROUP(intc_ex_irq5),
SH_PFC_PIN_GROUP(hscif2_data_b), SH_PFC_PIN_GROUP(msiof0_clk),
SH_PFC_PIN_GROUP(hscif2_clk_b), SH_PFC_PIN_GROUP(msiof0_sync),
SH_PFC_PIN_GROUP(hscif2_ctrl_b), SH_PFC_PIN_GROUP(msiof0_ss1),
SH_PFC_PIN_GROUP(hscif2_data_c), SH_PFC_PIN_GROUP(msiof0_ss2),
SH_PFC_PIN_GROUP(hscif2_clk_c), SH_PFC_PIN_GROUP(msiof0_txd),
SH_PFC_PIN_GROUP(hscif2_ctrl_c), SH_PFC_PIN_GROUP(msiof0_rxd),
SH_PFC_PIN_GROUP(hscif3_data_a), SH_PFC_PIN_GROUP(msiof1_clk_a),
SH_PFC_PIN_GROUP(hscif3_clk), SH_PFC_PIN_GROUP(msiof1_sync_a),
SH_PFC_PIN_GROUP(hscif3_ctrl), SH_PFC_PIN_GROUP(msiof1_ss1_a),
SH_PFC_PIN_GROUP(hscif3_data_b), SH_PFC_PIN_GROUP(msiof1_ss2_a),
SH_PFC_PIN_GROUP(hscif3_data_c), SH_PFC_PIN_GROUP(msiof1_txd_a),
SH_PFC_PIN_GROUP(hscif3_data_d), SH_PFC_PIN_GROUP(msiof1_rxd_a),
SH_PFC_PIN_GROUP(hscif4_data_a), SH_PFC_PIN_GROUP(msiof1_clk_b),
SH_PFC_PIN_GROUP(hscif4_clk), SH_PFC_PIN_GROUP(msiof1_sync_b),
SH_PFC_PIN_GROUP(hscif4_ctrl), SH_PFC_PIN_GROUP(msiof1_ss1_b),
SH_PFC_PIN_GROUP(hscif4_data_b), SH_PFC_PIN_GROUP(msiof1_ss2_b),
SH_PFC_PIN_GROUP(i2c1_a), SH_PFC_PIN_GROUP(msiof1_txd_b),
SH_PFC_PIN_GROUP(i2c1_b), SH_PFC_PIN_GROUP(msiof1_rxd_b),
SH_PFC_PIN_GROUP(i2c2_a), SH_PFC_PIN_GROUP(msiof1_clk_c),
SH_PFC_PIN_GROUP(i2c2_b), SH_PFC_PIN_GROUP(msiof1_sync_c),
SH_PFC_PIN_GROUP(i2c6_a), SH_PFC_PIN_GROUP(msiof1_ss1_c),
SH_PFC_PIN_GROUP(i2c6_b), SH_PFC_PIN_GROUP(msiof1_ss2_c),
SH_PFC_PIN_GROUP(i2c6_c), SH_PFC_PIN_GROUP(msiof1_txd_c),
SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(msiof1_rxd_c),
SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(msiof1_clk_d),
SH_PFC_PIN_GROUP(intc_ex_irq2), SH_PFC_PIN_GROUP(msiof1_sync_d),
SH_PFC_PIN_GROUP(intc_ex_irq3), SH_PFC_PIN_GROUP(msiof1_ss1_d),
SH_PFC_PIN_GROUP(intc_ex_irq4), SH_PFC_PIN_GROUP(msiof1_ss2_d),
SH_PFC_PIN_GROUP(intc_ex_irq5), SH_PFC_PIN_GROUP(msiof1_txd_d),
SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof1_rxd_d),
SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof1_clk_e),
SH_PFC_PIN_GROUP(msiof0_ss1), SH_PFC_PIN_GROUP(msiof1_sync_e),
SH_PFC_PIN_GROUP(msiof0_ss2), SH_PFC_PIN_GROUP(msiof1_ss1_e),
SH_PFC_PIN_GROUP(msiof0_txd), SH_PFC_PIN_GROUP(msiof1_ss2_e),
SH_PFC_PIN_GROUP(msiof0_rxd), SH_PFC_PIN_GROUP(msiof1_txd_e),
SH_PFC_PIN_GROUP(msiof1_clk_a), SH_PFC_PIN_GROUP(msiof1_rxd_e),
SH_PFC_PIN_GROUP(msiof1_sync_a), SH_PFC_PIN_GROUP(msiof1_clk_f),
SH_PFC_PIN_GROUP(msiof1_ss1_a), SH_PFC_PIN_GROUP(msiof1_sync_f),
SH_PFC_PIN_GROUP(msiof1_ss2_a), SH_PFC_PIN_GROUP(msiof1_ss1_f),
SH_PFC_PIN_GROUP(msiof1_txd_a), SH_PFC_PIN_GROUP(msiof1_ss2_f),
SH_PFC_PIN_GROUP(msiof1_rxd_a), SH_PFC_PIN_GROUP(msiof1_txd_f),
SH_PFC_PIN_GROUP(msiof1_clk_b), SH_PFC_PIN_GROUP(msiof1_rxd_f),
SH_PFC_PIN_GROUP(msiof1_sync_b), SH_PFC_PIN_GROUP(msiof1_clk_g),
SH_PFC_PIN_GROUP(msiof1_ss1_b), SH_PFC_PIN_GROUP(msiof1_sync_g),
SH_PFC_PIN_GROUP(msiof1_ss2_b), SH_PFC_PIN_GROUP(msiof1_ss1_g),
SH_PFC_PIN_GROUP(msiof1_txd_b), SH_PFC_PIN_GROUP(msiof1_ss2_g),
SH_PFC_PIN_GROUP(msiof1_rxd_b), SH_PFC_PIN_GROUP(msiof1_txd_g),
SH_PFC_PIN_GROUP(msiof1_clk_c), SH_PFC_PIN_GROUP(msiof1_rxd_g),
SH_PFC_PIN_GROUP(msiof1_sync_c), SH_PFC_PIN_GROUP(msiof2_clk_a),
SH_PFC_PIN_GROUP(msiof1_ss1_c), SH_PFC_PIN_GROUP(msiof2_sync_a),
SH_PFC_PIN_GROUP(msiof1_ss2_c), SH_PFC_PIN_GROUP(msiof2_ss1_a),
SH_PFC_PIN_GROUP(msiof1_txd_c), SH_PFC_PIN_GROUP(msiof2_ss2_a),
SH_PFC_PIN_GROUP(msiof1_rxd_c), SH_PFC_PIN_GROUP(msiof2_txd_a),
SH_PFC_PIN_GROUP(msiof1_clk_d), SH_PFC_PIN_GROUP(msiof2_rxd_a),
SH_PFC_PIN_GROUP(msiof1_sync_d), SH_PFC_PIN_GROUP(msiof2_clk_b),
SH_PFC_PIN_GROUP(msiof1_ss1_d), SH_PFC_PIN_GROUP(msiof2_sync_b),
SH_PFC_PIN_GROUP(msiof1_ss2_d), SH_PFC_PIN_GROUP(msiof2_ss1_b),
SH_PFC_PIN_GROUP(msiof1_txd_d), SH_PFC_PIN_GROUP(msiof2_ss2_b),
SH_PFC_PIN_GROUP(msiof1_rxd_d), SH_PFC_PIN_GROUP(msiof2_txd_b),
SH_PFC_PIN_GROUP(msiof1_clk_e), SH_PFC_PIN_GROUP(msiof2_rxd_b),
SH_PFC_PIN_GROUP(msiof1_sync_e), SH_PFC_PIN_GROUP(msiof2_clk_c),
SH_PFC_PIN_GROUP(msiof1_ss1_e), SH_PFC_PIN_GROUP(msiof2_sync_c),
SH_PFC_PIN_GROUP(msiof1_ss2_e), SH_PFC_PIN_GROUP(msiof2_ss1_c),
SH_PFC_PIN_GROUP(msiof1_txd_e), SH_PFC_PIN_GROUP(msiof2_ss2_c),
SH_PFC_PIN_GROUP(msiof1_rxd_e), SH_PFC_PIN_GROUP(msiof2_txd_c),
SH_PFC_PIN_GROUP(msiof1_clk_f), SH_PFC_PIN_GROUP(msiof2_rxd_c),
SH_PFC_PIN_GROUP(msiof1_sync_f), SH_PFC_PIN_GROUP(msiof2_clk_d),
SH_PFC_PIN_GROUP(msiof1_ss1_f), SH_PFC_PIN_GROUP(msiof2_sync_d),
SH_PFC_PIN_GROUP(msiof1_ss2_f), SH_PFC_PIN_GROUP(msiof2_ss1_d),
SH_PFC_PIN_GROUP(msiof1_txd_f), SH_PFC_PIN_GROUP(msiof2_ss2_d),
SH_PFC_PIN_GROUP(msiof1_rxd_f), SH_PFC_PIN_GROUP(msiof2_txd_d),
SH_PFC_PIN_GROUP(msiof1_clk_g), SH_PFC_PIN_GROUP(msiof2_rxd_d),
SH_PFC_PIN_GROUP(msiof1_sync_g), SH_PFC_PIN_GROUP(msiof3_clk_a),
SH_PFC_PIN_GROUP(msiof1_ss1_g), SH_PFC_PIN_GROUP(msiof3_sync_a),
SH_PFC_PIN_GROUP(msiof1_ss2_g), SH_PFC_PIN_GROUP(msiof3_ss1_a),
SH_PFC_PIN_GROUP(msiof1_txd_g), SH_PFC_PIN_GROUP(msiof3_ss2_a),
SH_PFC_PIN_GROUP(msiof1_rxd_g), SH_PFC_PIN_GROUP(msiof3_txd_a),
SH_PFC_PIN_GROUP(msiof2_clk_a), SH_PFC_PIN_GROUP(msiof3_rxd_a),
SH_PFC_PIN_GROUP(msiof2_sync_a), SH_PFC_PIN_GROUP(msiof3_clk_b),
SH_PFC_PIN_GROUP(msiof2_ss1_a), SH_PFC_PIN_GROUP(msiof3_sync_b),
SH_PFC_PIN_GROUP(msiof2_ss2_a), SH_PFC_PIN_GROUP(msiof3_ss1_b),
SH_PFC_PIN_GROUP(msiof2_txd_a), SH_PFC_PIN_GROUP(msiof3_ss2_b),
SH_PFC_PIN_GROUP(msiof2_rxd_a), SH_PFC_PIN_GROUP(msiof3_txd_b),
SH_PFC_PIN_GROUP(msiof2_clk_b), SH_PFC_PIN_GROUP(msiof3_rxd_b),
SH_PFC_PIN_GROUP(msiof2_sync_b), SH_PFC_PIN_GROUP(msiof3_clk_c),
SH_PFC_PIN_GROUP(msiof2_ss1_b), SH_PFC_PIN_GROUP(msiof3_sync_c),
SH_PFC_PIN_GROUP(msiof2_ss2_b), SH_PFC_PIN_GROUP(msiof3_txd_c),
SH_PFC_PIN_GROUP(msiof2_txd_b), SH_PFC_PIN_GROUP(msiof3_rxd_c),
SH_PFC_PIN_GROUP(msiof2_rxd_b), SH_PFC_PIN_GROUP(msiof3_clk_d),
SH_PFC_PIN_GROUP(msiof2_clk_c), SH_PFC_PIN_GROUP(msiof3_sync_d),
SH_PFC_PIN_GROUP(msiof2_sync_c), SH_PFC_PIN_GROUP(msiof3_ss1_d),
SH_PFC_PIN_GROUP(msiof2_ss1_c), SH_PFC_PIN_GROUP(msiof3_txd_d),
SH_PFC_PIN_GROUP(msiof2_ss2_c), SH_PFC_PIN_GROUP(msiof3_rxd_d),
SH_PFC_PIN_GROUP(msiof2_txd_c), SH_PFC_PIN_GROUP(msiof3_clk_e),
SH_PFC_PIN_GROUP(msiof2_rxd_c), SH_PFC_PIN_GROUP(msiof3_sync_e),
SH_PFC_PIN_GROUP(msiof2_clk_d), SH_PFC_PIN_GROUP(msiof3_ss1_e),
SH_PFC_PIN_GROUP(msiof2_sync_d), SH_PFC_PIN_GROUP(msiof3_ss2_e),
SH_PFC_PIN_GROUP(msiof2_ss1_d), SH_PFC_PIN_GROUP(msiof3_txd_e),
SH_PFC_PIN_GROUP(msiof2_ss2_d), SH_PFC_PIN_GROUP(msiof3_rxd_e),
SH_PFC_PIN_GROUP(msiof2_txd_d), SH_PFC_PIN_GROUP(pwm0),
SH_PFC_PIN_GROUP(msiof2_rxd_d), SH_PFC_PIN_GROUP(pwm1_a),
SH_PFC_PIN_GROUP(msiof3_clk_a), SH_PFC_PIN_GROUP(pwm1_b),
SH_PFC_PIN_GROUP(msiof3_sync_a), SH_PFC_PIN_GROUP(pwm2_a),
SH_PFC_PIN_GROUP(msiof3_ss1_a), SH_PFC_PIN_GROUP(pwm2_b),
SH_PFC_PIN_GROUP(msiof3_ss2_a), SH_PFC_PIN_GROUP(pwm3_a),
SH_PFC_PIN_GROUP(msiof3_txd_a), SH_PFC_PIN_GROUP(pwm3_b),
SH_PFC_PIN_GROUP(msiof3_rxd_a), SH_PFC_PIN_GROUP(pwm4_a),
SH_PFC_PIN_GROUP(msiof3_clk_b), SH_PFC_PIN_GROUP(pwm4_b),
SH_PFC_PIN_GROUP(msiof3_sync_b), SH_PFC_PIN_GROUP(pwm5_a),
SH_PFC_PIN_GROUP(msiof3_ss1_b), SH_PFC_PIN_GROUP(pwm5_b),
SH_PFC_PIN_GROUP(msiof3_ss2_b), SH_PFC_PIN_GROUP(pwm6_a),
SH_PFC_PIN_GROUP(msiof3_txd_b), SH_PFC_PIN_GROUP(pwm6_b),
SH_PFC_PIN_GROUP(msiof3_rxd_b), SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(msiof3_clk_c), SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(msiof3_sync_c), SH_PFC_PIN_GROUP(scif0_ctrl),
SH_PFC_PIN_GROUP(msiof3_txd_c), SH_PFC_PIN_GROUP(scif1_data_a),
SH_PFC_PIN_GROUP(msiof3_rxd_c), SH_PFC_PIN_GROUP(scif1_clk),
SH_PFC_PIN_GROUP(msiof3_clk_d), SH_PFC_PIN_GROUP(scif1_ctrl),
SH_PFC_PIN_GROUP(msiof3_sync_d), SH_PFC_PIN_GROUP(scif1_data_b),
SH_PFC_PIN_GROUP(msiof3_ss1_d), SH_PFC_PIN_GROUP(scif2_data_a),
SH_PFC_PIN_GROUP(msiof3_txd_d), SH_PFC_PIN_GROUP(scif2_clk),
SH_PFC_PIN_GROUP(msiof3_rxd_d), SH_PFC_PIN_GROUP(scif2_data_b),
SH_PFC_PIN_GROUP(msiof3_clk_e), SH_PFC_PIN_GROUP(scif3_data_a),
SH_PFC_PIN_GROUP(msiof3_sync_e), SH_PFC_PIN_GROUP(scif3_clk),
SH_PFC_PIN_GROUP(msiof3_ss1_e), SH_PFC_PIN_GROUP(scif3_ctrl),
SH_PFC_PIN_GROUP(msiof3_ss2_e), SH_PFC_PIN_GROUP(scif3_data_b),
SH_PFC_PIN_GROUP(msiof3_txd_e), SH_PFC_PIN_GROUP(scif4_data_a),
SH_PFC_PIN_GROUP(msiof3_rxd_e), SH_PFC_PIN_GROUP(scif4_clk_a),
SH_PFC_PIN_GROUP(pwm0), SH_PFC_PIN_GROUP(scif4_ctrl_a),
SH_PFC_PIN_GROUP(pwm1_a), SH_PFC_PIN_GROUP(scif4_data_b),
SH_PFC_PIN_GROUP(pwm1_b), SH_PFC_PIN_GROUP(scif4_clk_b),
SH_PFC_PIN_GROUP(pwm2_a), SH_PFC_PIN_GROUP(scif4_ctrl_b),
SH_PFC_PIN_GROUP(pwm2_b), SH_PFC_PIN_GROUP(scif4_data_c),
SH_PFC_PIN_GROUP(pwm3_a), SH_PFC_PIN_GROUP(scif4_clk_c),
SH_PFC_PIN_GROUP(pwm3_b), SH_PFC_PIN_GROUP(scif4_ctrl_c),
SH_PFC_PIN_GROUP(pwm4_a), SH_PFC_PIN_GROUP(scif5_data_a),
SH_PFC_PIN_GROUP(pwm4_b), SH_PFC_PIN_GROUP(scif5_clk_a),
SH_PFC_PIN_GROUP(pwm5_a), SH_PFC_PIN_GROUP(scif5_data_b),
SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(scif5_clk_b),
SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(scif_clk_a),
SH_PFC_PIN_GROUP(pwm6_b), SH_PFC_PIN_GROUP(scif_clk_b),
SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(sdhi0_data1),
SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(sdhi0_data4),
SH_PFC_PIN_GROUP(scif0_ctrl), SH_PFC_PIN_GROUP(sdhi0_ctrl),
SH_PFC_PIN_GROUP(scif1_data_a), SH_PFC_PIN_GROUP(sdhi0_cd),
SH_PFC_PIN_GROUP(scif1_clk), SH_PFC_PIN_GROUP(sdhi0_wp),
SH_PFC_PIN_GROUP(scif1_ctrl), SH_PFC_PIN_GROUP(sdhi1_data1),
SH_PFC_PIN_GROUP(scif1_data_b), SH_PFC_PIN_GROUP(sdhi1_data4),
SH_PFC_PIN_GROUP(scif2_data_a), SH_PFC_PIN_GROUP(sdhi1_ctrl),
SH_PFC_PIN_GROUP(scif2_clk), SH_PFC_PIN_GROUP(sdhi1_cd),
SH_PFC_PIN_GROUP(scif2_data_b), SH_PFC_PIN_GROUP(sdhi1_wp),
SH_PFC_PIN_GROUP(scif3_data_a), SH_PFC_PIN_GROUP(sdhi2_data1),
SH_PFC_PIN_GROUP(scif3_clk), SH_PFC_PIN_GROUP(sdhi2_data4),
SH_PFC_PIN_GROUP(scif3_ctrl), SH_PFC_PIN_GROUP(sdhi2_data8),
SH_PFC_PIN_GROUP(scif3_data_b), SH_PFC_PIN_GROUP(sdhi2_ctrl),
SH_PFC_PIN_GROUP(scif4_data_a), SH_PFC_PIN_GROUP(sdhi2_cd_a),
SH_PFC_PIN_GROUP(scif4_clk_a), SH_PFC_PIN_GROUP(sdhi2_wp_a),
SH_PFC_PIN_GROUP(scif4_ctrl_a), SH_PFC_PIN_GROUP(sdhi2_cd_b),
SH_PFC_PIN_GROUP(scif4_data_b), SH_PFC_PIN_GROUP(sdhi2_wp_b),
SH_PFC_PIN_GROUP(scif4_clk_b), SH_PFC_PIN_GROUP(sdhi2_ds),
SH_PFC_PIN_GROUP(scif4_ctrl_b), SH_PFC_PIN_GROUP(sdhi3_data1),
SH_PFC_PIN_GROUP(scif4_data_c), SH_PFC_PIN_GROUP(sdhi3_data4),
SH_PFC_PIN_GROUP(scif4_clk_c), SH_PFC_PIN_GROUP(sdhi3_data8),
SH_PFC_PIN_GROUP(scif4_ctrl_c), SH_PFC_PIN_GROUP(sdhi3_ctrl),
SH_PFC_PIN_GROUP(scif5_data_a), SH_PFC_PIN_GROUP(sdhi3_cd),
SH_PFC_PIN_GROUP(scif5_clk_a), SH_PFC_PIN_GROUP(sdhi3_wp),
SH_PFC_PIN_GROUP(scif5_data_b), SH_PFC_PIN_GROUP(sdhi3_ds),
SH_PFC_PIN_GROUP(scif5_clk_b), SH_PFC_PIN_GROUP(ssi0_data),
SH_PFC_PIN_GROUP(scif_clk_a), SH_PFC_PIN_GROUP(ssi01239_ctrl),
SH_PFC_PIN_GROUP(scif_clk_b), SH_PFC_PIN_GROUP(ssi1_data_a),
SH_PFC_PIN_GROUP(sdhi0_data1), SH_PFC_PIN_GROUP(ssi1_data_b),
SH_PFC_PIN_GROUP(sdhi0_data4), SH_PFC_PIN_GROUP(ssi1_ctrl_a),
SH_PFC_PIN_GROUP(sdhi0_ctrl), SH_PFC_PIN_GROUP(ssi1_ctrl_b),
SH_PFC_PIN_GROUP(sdhi0_cd), SH_PFC_PIN_GROUP(ssi2_data_a),
SH_PFC_PIN_GROUP(sdhi0_wp), SH_PFC_PIN_GROUP(ssi2_data_b),
SH_PFC_PIN_GROUP(sdhi1_data1), SH_PFC_PIN_GROUP(ssi2_ctrl_a),
SH_PFC_PIN_GROUP(sdhi1_data4), SH_PFC_PIN_GROUP(ssi2_ctrl_b),
SH_PFC_PIN_GROUP(sdhi1_ctrl), SH_PFC_PIN_GROUP(ssi3_data),
SH_PFC_PIN_GROUP(sdhi1_cd), SH_PFC_PIN_GROUP(ssi349_ctrl),
SH_PFC_PIN_GROUP(sdhi1_wp), SH_PFC_PIN_GROUP(ssi4_data),
SH_PFC_PIN_GROUP(sdhi2_data1), SH_PFC_PIN_GROUP(ssi4_ctrl),
SH_PFC_PIN_GROUP(sdhi2_data4), SH_PFC_PIN_GROUP(ssi5_data),
SH_PFC_PIN_GROUP(sdhi2_data8), SH_PFC_PIN_GROUP(ssi5_ctrl),
SH_PFC_PIN_GROUP(sdhi2_ctrl), SH_PFC_PIN_GROUP(ssi6_data),
SH_PFC_PIN_GROUP(sdhi2_cd_a), SH_PFC_PIN_GROUP(ssi6_ctrl),
SH_PFC_PIN_GROUP(sdhi2_wp_a), SH_PFC_PIN_GROUP(ssi7_data),
SH_PFC_PIN_GROUP(sdhi2_cd_b), SH_PFC_PIN_GROUP(ssi78_ctrl),
SH_PFC_PIN_GROUP(sdhi2_wp_b), SH_PFC_PIN_GROUP(ssi8_data),
SH_PFC_PIN_GROUP(sdhi2_ds), SH_PFC_PIN_GROUP(ssi9_data_a),
SH_PFC_PIN_GROUP(sdhi3_data1), SH_PFC_PIN_GROUP(ssi9_data_b),
SH_PFC_PIN_GROUP(sdhi3_data4), SH_PFC_PIN_GROUP(ssi9_ctrl_a),
SH_PFC_PIN_GROUP(sdhi3_data8), SH_PFC_PIN_GROUP(ssi9_ctrl_b),
SH_PFC_PIN_GROUP(sdhi3_ctrl), SH_PFC_PIN_GROUP(tmu_tclk1_a),
SH_PFC_PIN_GROUP(sdhi3_cd), SH_PFC_PIN_GROUP(tmu_tclk1_b),
SH_PFC_PIN_GROUP(sdhi3_wp), SH_PFC_PIN_GROUP(tmu_tclk2_a),
SH_PFC_PIN_GROUP(sdhi3_ds), SH_PFC_PIN_GROUP(tmu_tclk2_b),
SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(usb0),
SH_PFC_PIN_GROUP(ssi01239_ctrl), SH_PFC_PIN_GROUP(usb1),
SH_PFC_PIN_GROUP(ssi1_data_a), SH_PFC_PIN_GROUP(usb30),
SH_PFC_PIN_GROUP(ssi1_data_b), VIN_DATA_PIN_GROUP(vin4_data_a, 8),
SH_PFC_PIN_GROUP(ssi1_ctrl_a), VIN_DATA_PIN_GROUP(vin4_data_a, 10),
SH_PFC_PIN_GROUP(ssi1_ctrl_b), VIN_DATA_PIN_GROUP(vin4_data_a, 12),
SH_PFC_PIN_GROUP(ssi2_data_a), VIN_DATA_PIN_GROUP(vin4_data_a, 16),
SH_PFC_PIN_GROUP(ssi2_data_b), SH_PFC_PIN_GROUP(vin4_data18_a),
SH_PFC_PIN_GROUP(ssi2_ctrl_a), VIN_DATA_PIN_GROUP(vin4_data_a, 20),
SH_PFC_PIN_GROUP(ssi2_ctrl_b), VIN_DATA_PIN_GROUP(vin4_data_a, 24),
SH_PFC_PIN_GROUP(ssi3_data), VIN_DATA_PIN_GROUP(vin4_data_b, 8),
SH_PFC_PIN_GROUP(ssi349_ctrl), VIN_DATA_PIN_GROUP(vin4_data_b, 10),
SH_PFC_PIN_GROUP(ssi4_data), VIN_DATA_PIN_GROUP(vin4_data_b, 12),
SH_PFC_PIN_GROUP(ssi4_ctrl), VIN_DATA_PIN_GROUP(vin4_data_b, 16),
SH_PFC_PIN_GROUP(ssi5_data), SH_PFC_PIN_GROUP(vin4_data18_b),
SH_PFC_PIN_GROUP(ssi5_ctrl), VIN_DATA_PIN_GROUP(vin4_data_b, 20),
SH_PFC_PIN_GROUP(ssi6_data), VIN_DATA_PIN_GROUP(vin4_data_b, 24),
SH_PFC_PIN_GROUP(ssi6_ctrl), SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(ssi7_data), SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(ssi78_ctrl), SH_PFC_PIN_GROUP(vin4_clkenb),
SH_PFC_PIN_GROUP(ssi8_data), SH_PFC_PIN_GROUP(vin4_clk),
SH_PFC_PIN_GROUP(ssi9_data_a), SH_PFC_PIN_GROUP(vin5_data8),
SH_PFC_PIN_GROUP(ssi9_data_b), SH_PFC_PIN_GROUP(vin5_data10),
SH_PFC_PIN_GROUP(ssi9_ctrl_a), SH_PFC_PIN_GROUP(vin5_data12),
SH_PFC_PIN_GROUP(ssi9_ctrl_b), SH_PFC_PIN_GROUP(vin5_data16),
SH_PFC_PIN_GROUP(tmu_tclk1_a), SH_PFC_PIN_GROUP(vin5_sync),
SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(vin5_field),
SH_PFC_PIN_GROUP(tmu_tclk2_a), SH_PFC_PIN_GROUP(vin5_clkenb),
SH_PFC_PIN_GROUP(tmu_tclk2_b), SH_PFC_PIN_GROUP(vin5_clk),
SH_PFC_PIN_GROUP(usb0), },
SH_PFC_PIN_GROUP(usb1), .r8a779x = {
SH_PFC_PIN_GROUP(usb30), SH_PFC_PIN_GROUP(canfd0_data_a),
VIN_DATA_PIN_GROUP(vin4_data_a, 8), SH_PFC_PIN_GROUP(canfd0_data_b),
VIN_DATA_PIN_GROUP(vin4_data_a, 10), SH_PFC_PIN_GROUP(canfd1_data),
VIN_DATA_PIN_GROUP(vin4_data_a, 12), SH_PFC_PIN_GROUP(drif0_ctrl_a),
VIN_DATA_PIN_GROUP(vin4_data_a, 16), SH_PFC_PIN_GROUP(drif0_data0_a),
SH_PFC_PIN_GROUP(vin4_data18_a), SH_PFC_PIN_GROUP(drif0_data1_a),
VIN_DATA_PIN_GROUP(vin4_data_a, 20), SH_PFC_PIN_GROUP(drif0_ctrl_b),
VIN_DATA_PIN_GROUP(vin4_data_a, 24), SH_PFC_PIN_GROUP(drif0_data0_b),
VIN_DATA_PIN_GROUP(vin4_data_b, 8), SH_PFC_PIN_GROUP(drif0_data1_b),
VIN_DATA_PIN_GROUP(vin4_data_b, 10), SH_PFC_PIN_GROUP(drif0_ctrl_c),
VIN_DATA_PIN_GROUP(vin4_data_b, 12), SH_PFC_PIN_GROUP(drif0_data0_c),
VIN_DATA_PIN_GROUP(vin4_data_b, 16), SH_PFC_PIN_GROUP(drif0_data1_c),
SH_PFC_PIN_GROUP(vin4_data18_b), SH_PFC_PIN_GROUP(drif1_ctrl_a),
VIN_DATA_PIN_GROUP(vin4_data_b, 20), SH_PFC_PIN_GROUP(drif1_data0_a),
VIN_DATA_PIN_GROUP(vin4_data_b, 24), SH_PFC_PIN_GROUP(drif1_data1_a),
SH_PFC_PIN_GROUP(vin4_sync), SH_PFC_PIN_GROUP(drif1_ctrl_b),
SH_PFC_PIN_GROUP(vin4_field), SH_PFC_PIN_GROUP(drif1_data0_b),
SH_PFC_PIN_GROUP(vin4_clkenb), SH_PFC_PIN_GROUP(drif1_data1_b),
SH_PFC_PIN_GROUP(vin4_clk), SH_PFC_PIN_GROUP(drif1_ctrl_c),
SH_PFC_PIN_GROUP(vin5_data8), SH_PFC_PIN_GROUP(drif1_data0_c),
SH_PFC_PIN_GROUP(vin5_data10), SH_PFC_PIN_GROUP(drif1_data1_c),
SH_PFC_PIN_GROUP(vin5_data12), SH_PFC_PIN_GROUP(drif2_ctrl_a),
SH_PFC_PIN_GROUP(vin5_data16), SH_PFC_PIN_GROUP(drif2_data0_a),
SH_PFC_PIN_GROUP(vin5_sync), SH_PFC_PIN_GROUP(drif2_data1_a),
SH_PFC_PIN_GROUP(vin5_field), SH_PFC_PIN_GROUP(drif2_ctrl_b),
SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(drif2_data0_b),
SH_PFC_PIN_GROUP(vin5_clk), SH_PFC_PIN_GROUP(drif2_data1_b),
SH_PFC_PIN_GROUP(drif3_ctrl_a),
SH_PFC_PIN_GROUP(drif3_data0_a),
SH_PFC_PIN_GROUP(drif3_data1_a),
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
}
}; };
static const char * const audio_clk_groups[] = { static const char * const audio_clk_groups[] = {
@ -4962,58 +4969,65 @@ static const char * const vin5_groups[] = {
"vin5_clk", "vin5_clk",
}; };
static const struct sh_pfc_function pinmux_functions[] = { static const struct {
SH_PFC_FUNCTION(audio_clk), struct sh_pfc_function common[45];
SH_PFC_FUNCTION(avb), struct sh_pfc_function r8a779x[6];
SH_PFC_FUNCTION(can0), } pinmux_functions = {
SH_PFC_FUNCTION(can1), .common = {
SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(audio_clk),
SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(avb),
SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(can0),
SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(can1),
SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(can_clk),
SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(du),
SH_PFC_FUNCTION(drif3), SH_PFC_FUNCTION(hdmi0),
SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hdmi0), SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif2),
SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(hscif3),
SH_PFC_FUNCTION(hscif2), SH_PFC_FUNCTION(hscif4),
SH_PFC_FUNCTION(hscif3), SH_PFC_FUNCTION(i2c1),
SH_PFC_FUNCTION(hscif4), SH_PFC_FUNCTION(i2c2),
SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c6),
SH_PFC_FUNCTION(i2c2), SH_PFC_FUNCTION(intc_ex),
SH_PFC_FUNCTION(i2c6), SH_PFC_FUNCTION(msiof0),
SH_PFC_FUNCTION(intc_ex), SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof2),
SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof3),
SH_PFC_FUNCTION(msiof2), SH_PFC_FUNCTION(pwm0),
SH_PFC_FUNCTION(msiof3), SH_PFC_FUNCTION(pwm1),
SH_PFC_FUNCTION(pwm0), SH_PFC_FUNCTION(pwm2),
SH_PFC_FUNCTION(pwm1), SH_PFC_FUNCTION(pwm3),
SH_PFC_FUNCTION(pwm2), SH_PFC_FUNCTION(pwm4),
SH_PFC_FUNCTION(pwm3), SH_PFC_FUNCTION(pwm5),
SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm6),
SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(pwm6), SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif2),
SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif3),
SH_PFC_FUNCTION(scif2), SH_PFC_FUNCTION(scif4),
SH_PFC_FUNCTION(scif3), SH_PFC_FUNCTION(scif5),
SH_PFC_FUNCTION(scif4), SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(scif5), SH_PFC_FUNCTION(sdhi0),
SH_PFC_FUNCTION(scif_clk), SH_PFC_FUNCTION(sdhi1),
SH_PFC_FUNCTION(sdhi0), SH_PFC_FUNCTION(sdhi2),
SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi3),
SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(ssi),
SH_PFC_FUNCTION(sdhi3), SH_PFC_FUNCTION(tmu),
SH_PFC_FUNCTION(ssi), SH_PFC_FUNCTION(usb0),
SH_PFC_FUNCTION(tmu), SH_PFC_FUNCTION(usb1),
SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb30),
SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(vin4),
SH_PFC_FUNCTION(usb30), SH_PFC_FUNCTION(vin5),
SH_PFC_FUNCTION(vin4), },
SH_PFC_FUNCTION(vin5), .r8a779x = {
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
}
}; };
static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
@ -6137,8 +6151,9 @@ static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = {
.set_bias = r8a7796_pinmux_set_bias, .set_bias = r8a7796_pinmux_set_bias,
}; };
const struct sh_pfc_soc_info r8a7796_pinmux_info = { #ifdef CONFIG_PINCTRL_PFC_R8A774A1
.name = "r8a77960_pfc", const struct sh_pfc_soc_info r8a774a1_pinmux_info = {
.name = "r8a774a1_pfc",
.ops = &r8a7796_pinmux_ops, .ops = &r8a7796_pinmux_ops,
.unlock_reg = 0xe6060000, /* PMMR */ .unlock_reg = 0xe6060000, /* PMMR */
@ -6146,10 +6161,10 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
.pins = pinmux_pins, .pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins), .nr_pins = ARRAY_SIZE(pinmux_pins),
.groups = pinmux_groups, .groups = pinmux_groups.common,
.nr_groups = ARRAY_SIZE(pinmux_groups), .nr_groups = ARRAY_SIZE(pinmux_groups.common),
.functions = pinmux_functions, .functions = pinmux_functions.common,
.nr_functions = ARRAY_SIZE(pinmux_functions), .nr_functions = ARRAY_SIZE(pinmux_functions.common),
.cfg_regs = pinmux_config_regs, .cfg_regs = pinmux_config_regs,
.drive_regs = pinmux_drive_regs, .drive_regs = pinmux_drive_regs,
@ -6159,3 +6174,31 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
.pinmux_data = pinmux_data, .pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data), .pinmux_data_size = ARRAY_SIZE(pinmux_data),
}; };
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A7796
const struct sh_pfc_soc_info r8a7796_pinmux_info = {
.name = "r8a77960_pfc",
.ops = &r8a7796_pinmux_ops,
.unlock_reg = 0xe6060000, /* PMMR */
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.groups = pinmux_groups.common,
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
ARRAY_SIZE(pinmux_groups.r8a779x),
.functions = pinmux_functions.common,
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
ARRAY_SIZE(pinmux_functions.r8a779x),
.cfg_regs = pinmux_config_regs,
.drive_regs = pinmux_drive_regs,
.bias_regs = pinmux_bias_regs,
.ioctrl_regs = pinmux_ioctrl_regs,
.pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
};
#endif

1
drivers/pinctrl/sh-pfc/sh_pfc.h
View File

@ -275,6 +275,7 @@ extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
extern const struct sh_pfc_soc_info r8a7743_pinmux_info; extern const struct sh_pfc_soc_info r8a7743_pinmux_info;
extern const struct sh_pfc_soc_info r8a7745_pinmux_info; extern const struct sh_pfc_soc_info r8a7745_pinmux_info;
extern const struct sh_pfc_soc_info r8a77470_pinmux_info; extern const struct sh_pfc_soc_info r8a77470_pinmux_info;
extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
extern const struct sh_pfc_soc_info r8a7778_pinmux_info; extern const struct sh_pfc_soc_info r8a7778_pinmux_info;
extern const struct sh_pfc_soc_info r8a7779_pinmux_info; extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
extern const struct sh_pfc_soc_info r8a7790_pinmux_info; extern const struct sh_pfc_soc_info r8a7790_pinmux_info;