drm/amd/amdgpu: fix the HDP LS/DS/SD programming
confirmed that IPH_MEM_POWER_CTRL_EN and RC_MEM_POWER_CTRL_EN have to be set for SRAM LS/DS/SD Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -889,6 +889,16 @@ static void nv_update_hdp_mem_power_gating(struct amdgpu_device *adev,
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RC_MEM_POWER_DS_EN, enable);
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}
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/* confirmed that IPH_MEM_POWER_CTRL_EN and RC_MEM_POWER_CTRL_EN have to
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* be set for SRAM LS/DS/SD */
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if (adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | AMD_CG_SUPPORT_HDP_DS |
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AMD_CG_SUPPORT_HDP_SD)) {
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hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL,
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IPH_MEM_POWER_CTRL_EN, 1);
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hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL,
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RC_MEM_POWER_CTRL_EN, 1);
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}
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WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);
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/* restore IPH & RC clock override after clock/power mode changing */
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