Merge branch 'ARM-Enable-GENET-support-for-RPi-4'
Stefan Wahren says: ==================== ARM: Enable GENET support for RPi 4 Raspberry Pi 4 uses the broadcom genet chip in version five. This chip has a dma controller integrated. Up to now the maximal burst size was hard-coded to 0x10. But it turns out that Raspberry Pi 4 does only work with the smaller maximal burst size of 0x8. Additionally the patch series has some IRQ retrieval improvements and adds support for a missing PHY mode. This series based on Matthias Brugger's V1 series [1]. [1] - https://patchwork.kernel.org/cover/11186193/ Changes in V5: - address Doug's comment Changes in V4: - rebased on current net-next - remove RGMII_ID support - remove fixes tag from patch 1 - add Florian's suggestions to patch 5 Changes in V3: - introduce SoC-specific compatibles for GENET (incl. dt-binding) - use platform_get_irq_optional for optional IRQ - remove Fixes tag from IRQ error handling change - move most of MDIO stuff to bcm2711.dtsi Changes in V2: - add 2 fixes for IRQ retrieval - add support for missing PHY modes - declare PHY mode RGMII RXID based on the default settings - add alias to allow firmware append the MAC address ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
90bc72b13c
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@ -2,7 +2,7 @@
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Required properties:
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- compatible: should contain one of "brcm,genet-v1", "brcm,genet-v2",
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"brcm,genet-v3", "brcm,genet-v4", "brcm,genet-v5".
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"brcm,genet-v3", "brcm,genet-v4", "brcm,genet-v5", "brcm,bcm2711-genet-v5".
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- reg: address and length of the register set for the device
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- interrupts and/or interrupts-extended: must be two cells, the first cell
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is the general purpose interrupt line, while the second cell is the
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@ -2576,7 +2576,8 @@ static int bcmgenet_init_dma(struct bcmgenet_priv *priv)
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}
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/* Init rDma */
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bcmgenet_rdma_writel(priv, DMA_MAX_BURST_LENGTH, DMA_SCB_BURST_SIZE);
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bcmgenet_rdma_writel(priv, priv->dma_max_burst_length,
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DMA_SCB_BURST_SIZE);
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/* Initialize Rx queues */
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ret = bcmgenet_init_rx_queues(priv->dev);
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@ -2589,7 +2590,8 @@ static int bcmgenet_init_dma(struct bcmgenet_priv *priv)
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}
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/* Init tDma */
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bcmgenet_tdma_writel(priv, DMA_MAX_BURST_LENGTH, DMA_SCB_BURST_SIZE);
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bcmgenet_tdma_writel(priv, priv->dma_max_burst_length,
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DMA_SCB_BURST_SIZE);
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/* Initialize Tx queues */
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bcmgenet_init_tx_queues(priv->dev);
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@ -3420,12 +3422,48 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv)
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params->words_per_bd);
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}
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struct bcmgenet_plat_data {
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enum bcmgenet_version version;
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u32 dma_max_burst_length;
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};
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static const struct bcmgenet_plat_data v1_plat_data = {
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.version = GENET_V1,
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.dma_max_burst_length = DMA_MAX_BURST_LENGTH,
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};
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static const struct bcmgenet_plat_data v2_plat_data = {
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.version = GENET_V2,
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.dma_max_burst_length = DMA_MAX_BURST_LENGTH,
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};
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static const struct bcmgenet_plat_data v3_plat_data = {
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.version = GENET_V3,
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.dma_max_burst_length = DMA_MAX_BURST_LENGTH,
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};
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static const struct bcmgenet_plat_data v4_plat_data = {
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.version = GENET_V4,
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.dma_max_burst_length = DMA_MAX_BURST_LENGTH,
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};
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static const struct bcmgenet_plat_data v5_plat_data = {
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.version = GENET_V5,
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.dma_max_burst_length = DMA_MAX_BURST_LENGTH,
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};
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static const struct bcmgenet_plat_data bcm2711_plat_data = {
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.version = GENET_V5,
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.dma_max_burst_length = 0x08,
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};
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static const struct of_device_id bcmgenet_match[] = {
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{ .compatible = "brcm,genet-v1", .data = (void *)GENET_V1 },
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{ .compatible = "brcm,genet-v2", .data = (void *)GENET_V2 },
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{ .compatible = "brcm,genet-v3", .data = (void *)GENET_V3 },
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{ .compatible = "brcm,genet-v4", .data = (void *)GENET_V4 },
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{ .compatible = "brcm,genet-v5", .data = (void *)GENET_V5 },
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{ .compatible = "brcm,genet-v1", .data = &v1_plat_data },
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{ .compatible = "brcm,genet-v2", .data = &v2_plat_data },
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{ .compatible = "brcm,genet-v3", .data = &v3_plat_data },
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{ .compatible = "brcm,genet-v4", .data = &v4_plat_data },
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{ .compatible = "brcm,genet-v5", .data = &v5_plat_data },
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{ .compatible = "brcm,bcm2711-genet-v5", .data = &bcm2711_plat_data },
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{ },
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};
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MODULE_DEVICE_TABLE(of, bcmgenet_match);
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@ -3435,6 +3473,7 @@ static int bcmgenet_probe(struct platform_device *pdev)
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struct bcmgenet_platform_data *pd = pdev->dev.platform_data;
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struct device_node *dn = pdev->dev.of_node;
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const struct of_device_id *of_id = NULL;
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const struct bcmgenet_plat_data *pdata;
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struct bcmgenet_priv *priv;
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struct net_device *dev;
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const void *macaddr;
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@ -3458,13 +3497,16 @@ static int bcmgenet_probe(struct platform_device *pdev)
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priv = netdev_priv(dev);
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priv->irq0 = platform_get_irq(pdev, 0);
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priv->irq1 = platform_get_irq(pdev, 1);
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priv->wol_irq = platform_get_irq(pdev, 2);
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if (!priv->irq0 || !priv->irq1) {
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dev_err(&pdev->dev, "can't find IRQs\n");
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err = -EINVAL;
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if (priv->irq0 < 0) {
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err = priv->irq0;
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goto err;
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}
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priv->irq1 = platform_get_irq(pdev, 1);
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if (priv->irq1 < 0) {
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err = priv->irq1;
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goto err;
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}
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priv->wol_irq = platform_get_irq_optional(pdev, 2);
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if (dn)
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macaddr = of_get_mac_address(dn);
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@ -3513,10 +3555,14 @@ static int bcmgenet_probe(struct platform_device *pdev)
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priv->dev = dev;
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priv->pdev = pdev;
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if (of_id)
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priv->version = (enum bcmgenet_version)of_id->data;
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else
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if (of_id) {
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pdata = of_id->data;
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priv->version = pdata->version;
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priv->dma_max_burst_length = pdata->dma_max_burst_length;
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} else {
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priv->version = pd->genet_version;
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priv->dma_max_burst_length = DMA_MAX_BURST_LENGTH;
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}
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priv->clk = devm_clk_get(&priv->pdev->dev, "enet");
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if (IS_ERR(priv->clk)) {
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@ -664,6 +664,7 @@ struct bcmgenet_priv {
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bool crc_fwd_en;
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unsigned int dma_rx_chk_bit;
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u32 dma_max_burst_length;
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u32 msg_enable;
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@ -213,11 +213,10 @@ int bcmgenet_mii_config(struct net_device *dev, bool init)
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udelay(2);
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}
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priv->ext_phy = !priv->internal_phy &&
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(priv->phy_interface != PHY_INTERFACE_MODE_MOCA);
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switch (priv->phy_interface) {
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case PHY_INTERFACE_MODE_INTERNAL:
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phy_name = "internal PHY";
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/* fall through */
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case PHY_INTERFACE_MODE_MOCA:
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/* Irrespective of the actually configured PHY speed (100 or
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* 1000) GENETv4 only has an internal GPHY so we will just end
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@ -229,11 +228,7 @@ int bcmgenet_mii_config(struct net_device *dev, bool init)
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else
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port_ctrl = PORT_MODE_INT_EPHY;
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bcmgenet_sys_writel(priv, port_ctrl, SYS_PORT_CTRL);
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if (priv->internal_phy) {
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phy_name = "internal PHY";
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} else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) {
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if (!phy_name) {
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phy_name = "MoCA";
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bcmgenet_moca_phy_setup(priv);
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}
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@ -242,11 +237,7 @@ int bcmgenet_mii_config(struct net_device *dev, bool init)
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case PHY_INTERFACE_MODE_MII:
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phy_name = "external MII";
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phy_set_max_speed(phydev, SPEED_100);
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bcmgenet_sys_writel(priv,
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PORT_MODE_EXT_EPHY, SYS_PORT_CTRL);
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/* Restore the MII PHY after isolation */
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if (bmcr >= 0)
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phy_write(phydev, MII_BMCR, bmcr);
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port_ctrl = PORT_MODE_EXT_EPHY;
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break;
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case PHY_INTERFACE_MODE_REVMII:
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@ -261,31 +252,43 @@ int bcmgenet_mii_config(struct net_device *dev, bool init)
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port_ctrl = PORT_MODE_EXT_RVMII_50;
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else
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port_ctrl = PORT_MODE_EXT_RVMII_25;
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bcmgenet_sys_writel(priv, port_ctrl, SYS_PORT_CTRL);
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break;
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case PHY_INTERFACE_MODE_RGMII:
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/* RGMII_NO_ID: TXC transitions at the same time as TXD
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* (requires PCB or receiver-side delay)
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* RGMII: Add 2ns delay on TXC (90 degree shift)
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*
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* ID is implicitly disabled for 100Mbps (RG)MII operation.
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*/
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phy_name = "external RGMII (no delay)";
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id_mode_dis = BIT(16);
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/* fall through */
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port_ctrl = PORT_MODE_EXT_GPHY;
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break;
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case PHY_INTERFACE_MODE_RGMII_TXID:
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if (id_mode_dis)
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phy_name = "external RGMII (no delay)";
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else
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phy_name = "external RGMII (TX delay)";
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bcmgenet_sys_writel(priv,
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PORT_MODE_EXT_GPHY, SYS_PORT_CTRL);
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/* RGMII_TXID: Add 2ns delay on TXC (90 degree shift) */
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phy_name = "external RGMII (TX delay)";
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port_ctrl = PORT_MODE_EXT_GPHY;
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break;
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case PHY_INTERFACE_MODE_RGMII_RXID:
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phy_name = "external RGMII (RX delay)";
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port_ctrl = PORT_MODE_EXT_GPHY;
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break;
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default:
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dev_err(kdev, "unknown phy mode: %d\n", priv->phy_interface);
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return -EINVAL;
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}
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bcmgenet_sys_writel(priv, port_ctrl, SYS_PORT_CTRL);
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/* Restore the MII PHY after isolation */
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if (bmcr >= 0)
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phy_write(phydev, MII_BMCR, bmcr);
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priv->ext_phy = !priv->internal_phy &&
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(priv->phy_interface != PHY_INTERFACE_MODE_MOCA);
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/* This is an external PHY (xMII), so we need to enable the RGMII
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* block for the interface to work
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*/
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