[media] em28xx: extend GPIO register definitions for the em25xx, em276x/7x/8x, em2874/174/84
The em25xx/em276x/7x/8x provides 4 GPIO register sets, each of them consisting of separate read and a write registers. The same registers are also used by the em2874/174/84. Signed-off-by: Frank Schäfer <fschaefer.oss@googlemail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Frank Schaefer
Mauro Carvalho Chehab
parent
c778edb5bd
commit
907d109bc2
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@ -285,14 +285,14 @@ static struct em28xx_reg_seq dikom_dk300_digital[] = {
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/* Reset for the most [digital] boards */
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static struct em28xx_reg_seq leadership_digital[] = {
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{EM2874_R80_GPIO, 0x70, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0x70, 0xff, 10},
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{ -1, -1, -1, -1},
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};
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static struct em28xx_reg_seq leadership_reset[] = {
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{EM2874_R80_GPIO, 0xf0, 0xff, 10},
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{EM2874_R80_GPIO, 0xb0, 0xff, 10},
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{EM2874_R80_GPIO, 0xf0, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xf0, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xb0, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xf0, 0xff, 10},
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{ -1, -1, -1, -1},
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};
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@ -301,25 +301,25 @@ static struct em28xx_reg_seq leadership_reset[] = {
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* GPIO_7 - LED
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*/
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static struct em28xx_reg_seq pctv_290e[] = {
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{EM2874_R80_GPIO, 0x00, 0xff, 80},
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{EM2874_R80_GPIO, 0x40, 0xff, 80}, /* GPIO_6 = 1 */
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{EM2874_R80_GPIO, 0xc0, 0xff, 80}, /* GPIO_7 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x00, 0xff, 80},
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{EM2874_R80_GPIO_P0_CTRL, 0x40, 0xff, 80}, /* GPIO_6 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0xc0, 0xff, 80}, /* GPIO_7 = 1 */
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{-1, -1, -1, -1},
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};
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#if 0
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static struct em28xx_reg_seq terratec_h5_gpio[] = {
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{EM28XX_R08_GPIO, 0xff, 0xff, 10},
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{EM2874_R80_GPIO, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO, 0xf2, 0xff, 50},
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{EM2874_R80_GPIO, 0xf6, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xf2, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 50},
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{ -1, -1, -1, -1},
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};
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static struct em28xx_reg_seq terratec_h5_digital[] = {
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{EM2874_R80_GPIO, 0xf6, 0xff, 10},
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{EM2874_R80_GPIO, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO, 0xa6, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 10},
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{ -1, -1, -1, -1},
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};
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#endif
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@ -335,39 +335,39 @@ static struct em28xx_reg_seq terratec_h5_digital[] = {
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* GPIO_7 - LED (green LED)
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*/
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static struct em28xx_reg_seq pctv_460e[] = {
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{EM2874_R80_GPIO, 0x01, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0x01, 0xff, 50},
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{0x0d, 0xff, 0xff, 50},
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{EM2874_R80_GPIO, 0x41, 0xff, 50}, /* GPIO_6=1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x41, 0xff, 50}, /* GPIO_6=1 */
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{0x0d, 0x42, 0xff, 50},
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{EM2874_R80_GPIO, 0x61, 0xff, 50}, /* GPIO_5=1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x61, 0xff, 50}, /* GPIO_5=1 */
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{ -1, -1, -1, -1},
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};
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static struct em28xx_reg_seq c3tech_digital_duo_digital[] = {
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{EM2874_R80_GPIO, 0xff, 0xff, 10},
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{EM2874_R80_GPIO, 0xfd, 0xff, 10}, /* xc5000 reset */
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{EM2874_R80_GPIO, 0xf9, 0xff, 35},
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{EM2874_R80_GPIO, 0xfd, 0xff, 10},
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{EM2874_R80_GPIO, 0xff, 0xff, 10},
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{EM2874_R80_GPIO, 0xfe, 0xff, 10},
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{EM2874_R80_GPIO, 0xbe, 0xff, 10},
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{EM2874_R80_GPIO, 0xfe, 0xff, 20},
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{EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xfd, 0xff, 10}, /* xc5000 reset */
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{EM2874_R80_GPIO_P0_CTRL, 0xf9, 0xff, 35},
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{EM2874_R80_GPIO_P0_CTRL, 0xfd, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xfe, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xbe, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xfe, 0xff, 20},
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{ -1, -1, -1, -1},
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};
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#if 0
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static struct em28xx_reg_seq hauppauge_930c_gpio[] = {
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{EM2874_R80_GPIO, 0x6f, 0xff, 10},
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{EM2874_R80_GPIO, 0x4f, 0xff, 10}, /* xc5000 reset */
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{EM2874_R80_GPIO, 0x6f, 0xff, 10},
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{EM2874_R80_GPIO, 0x4f, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0x6f, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0x4f, 0xff, 10}, /* xc5000 reset */
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{EM2874_R80_GPIO_P0_CTRL, 0x6f, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0x4f, 0xff, 10},
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{ -1, -1, -1, -1},
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};
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static struct em28xx_reg_seq hauppauge_930c_digital[] = {
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{EM2874_R80_GPIO, 0xf6, 0xff, 10},
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{EM2874_R80_GPIO, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO, 0xa6, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 10},
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{EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 10},
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{ -1, -1, -1, -1},
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};
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#endif
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@ -378,9 +378,9 @@ static struct em28xx_reg_seq hauppauge_930c_digital[] = {
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* GPIO_7 - LED, 0=active
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*/
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static struct em28xx_reg_seq maxmedia_ub425_tc[] = {
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{EM2874_R80_GPIO, 0x83, 0xff, 100},
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{EM2874_R80_GPIO, 0xc3, 0xff, 100}, /* GPIO_6 = 1 */
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{EM2874_R80_GPIO, 0x43, 0xff, 000}, /* GPIO_7 = 0 */
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{EM2874_R80_GPIO_P0_CTRL, 0x83, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xc3, 0xff, 100}, /* GPIO_6 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x43, 0xff, 000}, /* GPIO_7 = 0 */
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{-1, -1, -1, -1},
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};
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@ -391,9 +391,9 @@ static struct em28xx_reg_seq maxmedia_ub425_tc[] = {
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* GPIO_7: LED, 1=active
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*/
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static struct em28xx_reg_seq pctv_510e[] = {
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{EM2874_R80_GPIO, 0x10, 0xff, 100},
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{EM2874_R80_GPIO, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
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{EM2874_R80_GPIO, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x10, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
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{ -1, -1, -1, -1},
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};
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@ -404,10 +404,10 @@ static struct em28xx_reg_seq pctv_510e[] = {
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* GPIO_7: LED, 1=active
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*/
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static struct em28xx_reg_seq pctv_520e[] = {
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{EM2874_R80_GPIO, 0x10, 0xff, 100},
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{EM2874_R80_GPIO, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
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{EM2874_R80_GPIO, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
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{EM2874_R80_GPIO, 0xd4, 0xff, 000}, /* GPIO_7 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x10, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
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{EM2874_R80_GPIO_P0_CTRL, 0xd4, 0xff, 000}, /* GPIO_7 = 1 */
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{ -1, -1, -1, -1},
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};
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@ -2947,13 +2947,13 @@ static int em28xx_init_dev(struct em28xx *dev, struct usb_device *udev,
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break;
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case CHIP_ID_EM2874:
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chip_name = "em2874";
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dev->reg_gpio_num = EM2874_R80_GPIO;
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dev->reg_gpio_num = EM2874_R80_GPIO_P0_CTRL;
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dev->wait_after_write = 0;
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dev->eeprom_addrwidth_16bit = 1;
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break;
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case CHIP_ID_EM28174:
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chip_name = "em28174";
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dev->reg_gpio_num = EM2874_R80_GPIO;
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dev->reg_gpio_num = EM2874_R80_GPIO_P0_CTRL;
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dev->wait_after_write = 0;
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dev->eeprom_addrwidth_16bit = 1;
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break;
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@ -2963,7 +2963,7 @@ static int em28xx_init_dev(struct em28xx *dev, struct usb_device *udev,
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break;
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case CHIP_ID_EM2884:
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chip_name = "em2884";
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dev->reg_gpio_num = EM2874_R80_GPIO;
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dev->reg_gpio_num = EM2874_R80_GPIO_P0_CTRL;
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dev->wait_after_write = 0;
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dev->eeprom_addrwidth_16bit = 1;
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break;
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@ -421,23 +421,23 @@ static void hauppauge_hvr930c_init(struct em28xx *dev)
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int i;
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struct em28xx_reg_seq hauppauge_hvr930c_init[] = {
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{EM2874_R80_GPIO, 0xff, 0xff, 0x65},
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{EM2874_R80_GPIO, 0xfb, 0xff, 0x32},
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{EM2874_R80_GPIO, 0xff, 0xff, 0xb8},
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{EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 0x65},
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{EM2874_R80_GPIO_P0_CTRL, 0xfb, 0xff, 0x32},
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{EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 0xb8},
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{ -1, -1, -1, -1},
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};
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struct em28xx_reg_seq hauppauge_hvr930c_end[] = {
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{EM2874_R80_GPIO, 0xef, 0xff, 0x01},
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{EM2874_R80_GPIO, 0xaf, 0xff, 0x65},
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{EM2874_R80_GPIO, 0xef, 0xff, 0x76},
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{EM2874_R80_GPIO, 0xef, 0xff, 0x01},
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{EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
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{EM2874_R80_GPIO, 0xef, 0xff, 0x40},
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{EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x01},
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{EM2874_R80_GPIO_P0_CTRL, 0xaf, 0xff, 0x65},
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{EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x76},
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{EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x01},
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{EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x0b},
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{EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x40},
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{EM2874_R80_GPIO, 0xcf, 0xff, 0x65},
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{EM2874_R80_GPIO, 0xef, 0xff, 0x65},
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{EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
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{EM2874_R80_GPIO, 0xef, 0xff, 0x65},
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{EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x65},
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{EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x65},
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{EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x0b},
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{EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x65},
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{ -1, -1, -1, -1},
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};
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@ -488,15 +488,15 @@ static void terratec_h5_init(struct em28xx *dev)
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int i;
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struct em28xx_reg_seq terratec_h5_init[] = {
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{EM28XX_R08_GPIO, 0xff, 0xff, 10},
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{EM2874_R80_GPIO, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO, 0xf2, 0xff, 50},
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{EM2874_R80_GPIO, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xf2, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
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{ -1, -1, -1, -1},
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};
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struct em28xx_reg_seq terratec_h5_end[] = {
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{EM2874_R80_GPIO, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO, 0xa6, 0xff, 50},
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{EM2874_R80_GPIO, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
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{ -1, -1, -1, -1},
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};
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struct {
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@ -544,14 +544,14 @@ static void terratec_htc_stick_init(struct em28xx *dev)
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*/
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struct em28xx_reg_seq terratec_htc_stick_init[] = {
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{EM28XX_R08_GPIO, 0xff, 0xff, 10},
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{EM2874_R80_GPIO, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO, 0xe6, 0xff, 50},
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{EM2874_R80_GPIO, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
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{ -1, -1, -1, -1},
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};
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struct em28xx_reg_seq terratec_htc_stick_end[] = {
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{EM2874_R80_GPIO, 0xb6, 0xff, 100},
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{EM2874_R80_GPIO, 0xf6, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xb6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 50},
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{ -1, -1, -1, -1},
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};
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@ -591,15 +591,15 @@ static void terratec_htc_usb_xs_init(struct em28xx *dev)
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struct em28xx_reg_seq terratec_htc_usb_xs_init[] = {
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{EM28XX_R08_GPIO, 0xff, 0xff, 10},
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{EM2874_R80_GPIO, 0xb2, 0xff, 100},
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{EM2874_R80_GPIO, 0xb2, 0xff, 50},
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{EM2874_R80_GPIO, 0xb6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xb2, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xb2, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xb6, 0xff, 100},
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{ -1, -1, -1, -1},
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};
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struct em28xx_reg_seq terratec_htc_usb_xs_end[] = {
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{EM2874_R80_GPIO, 0xa6, 0xff, 100},
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{EM2874_R80_GPIO, 0xa6, 0xff, 50},
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{EM2874_R80_GPIO, 0xe6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 100},
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{EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 50},
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{EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
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{ -1, -1, -1, -1},
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};
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@ -193,7 +193,20 @@
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#define EM2874_R50_IR_CONFIG 0x50
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#define EM2874_R51_IR 0x51
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#define EM2874_R5F_TS_ENABLE 0x5f
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#define EM2874_R80_GPIO 0x80
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/* em2874/174/84, em25xx, em276x/7x/8x GPIO registers */
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/*
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* NOTE: not all ports are bonded out;
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* Some ports are multiplexed with special function I/O
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*/
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#define EM2874_R80_GPIO_P0_CTRL 0x80
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#define EM2874_R81_GPIO_P1_CTRL 0x81
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#define EM2874_R82_GPIO_P2_CTRL 0x82
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#define EM2874_R83_GPIO_P3_CTRL 0x83
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#define EM2874_R84_GPIO_P0_STATE 0x84
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#define EM2874_R85_GPIO_P1_STATE 0x85
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#define EM2874_R86_GPIO_P2_STATE 0x86
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#define EM2874_R87_GPIO_P3_STATE 0x87
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/* em2874 IR config register (0x50) */
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#define EM2874_IR_NEC 0x00
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