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drm/amd/display: add DalEnableHDMI20 key support 

[why]
"DalEnableHDMI20" set to 0, disallow HDMI YCbCr420 and  pixel clock > 340Mhz
Default is enabled.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2018-06-26 18:49:32 -04:00 committed by Alex Deucher
parent e0d85b20c7
commit 8fc0a0d4a0
3 changed files with 13 additions and 0 deletions
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1
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -251,6 +251,7 @@ struct dc_debug {
bool recovery_enabled;
bool avoid_vbios_exec_table;
bool scl_reset_length10;
bool hdmi20_disable;
};
struct dc_state;

6
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
View File

@ -646,6 +646,9 @@ static bool dce110_link_encoder_validate_hdmi_output(
if (!enc110->base.features.flags.bits.HDMI_6GB_EN &&
adjusted_pix_clk_khz >= 300000)
return false;
if (enc110->base.ctx->dc->debug.hdmi20_disable &&
crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
return false;
return true;
}
@ -773,6 +776,9 @@ void dce110_link_encoder_construct(
__func__,
result);
}
if (enc110->base.ctx->dc->debug.hdmi20_disable) {
enc110->base.features.flags.bits.HDMI_6GB_EN = 0;
}
}
bool dce110_link_encoder_validate_output_with_stream(

6
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
View File

@ -596,6 +596,9 @@ static bool dcn10_link_encoder_validate_hdmi_output(
if (!enc10->base.features.flags.bits.HDMI_6GB_EN &&
adjusted_pix_clk_khz >= 300000)
return false;
if (enc10->base.ctx->dc->debug.hdmi20_disable &&
crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
return false;
return true;
}
@ -728,6 +731,9 @@ void dcn10_link_encoder_construct(
__func__,
result);
}
if (enc10->base.ctx->dc->debug.hdmi20_disable) {
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
}
}
bool dcn10_link_encoder_validate_output_with_stream(