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- added D1 crypto node 

- enabled DVFS on OrangePi PC2 board
 - added GPIO line names on Nezha D1 board
 - added suniv USB nodes and enabled on licheepi-nano
 - new suniv boards: PopStick v1.1 and Lctech Pi
 - added Allwinner T113-s DTSI
 - added MangoPi MQ-R T113-s board variant
 - swapped DMA names for A23, A31, A33, D1, H3, H5, V3s
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Merge tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt

- added D1 crypto node
- enabled DVFS on OrangePi PC2 board
- added GPIO line names on Nezha D1 board
- added suniv USB nodes and enabled on licheepi-nano
- new suniv boards: PopStick v1.1 and Lctech Pi
- added Allwinner T113-s DTSI
- added MangoPi MQ-R T113-s board variant
- swapped DMA names for A23, A31, A33, D1, H3, H5, V3s

* tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sunxi: h3/h5: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sun8i: v3s: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sun8i: a23/a33: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sun6i: a31: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sunxi: add MangoPi MQ-R-T113 board
  dt-bindings: arm: sunxi: document MangoPi MQ-R board names
  ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi
  dts: add riscv include prefix link
  ARM: dts: suniv: Add Lctech Pi F1C200s devicetree
  ARM: dts: suniv: add device tree for PopStick v1.1
  dt-binding: arm: sunxi: add two board compatible strings
  dt-bindings: vendor-prefixes: add Source Parts and Lctech names
  ARM: dts: suniv: licheepi-nano: enable USB
  ARM: dts: suniv: add USB-related device nodes
  riscv: dts: nezha-d1: add gpio-line-names
  arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS
  riscv: dts: allwinner: d1: Add crypto engine node

Link: https://lore.kernel.org/r/20230408125156.GA17050@jernej-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-04-14 17:42:27 +02:00
parent 58982e1d3c a140b18f0c
commit 8f09b5ec41
19 changed files with 566 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
Documentation/devicetree/bindings/arm/sunxi.yaml
View File

@ -366,6 +366,12 @@ properties:
- const: lamobo,lamobo-r1
- const: allwinner,sun7i-a20
- description: Lctech Pi F1C200s
items:
- const: lctech,pi-f1c200s
- const: allwinner,suniv-f1c200s
- const: allwinner,suniv-f1c100s
- description: Libre Computer Board ALL-H3-CC H2+
items:
- const: libretech,all-h3-cc-h2-plus
@ -807,6 +813,13 @@ properties:
- const: sinlinx,sina33
- const: allwinner,sun8i-a33
- description: SourceParts PopStick v1.1
items:
- const: sourceparts,popstick-v1.1
- const: sourceparts,popstick
- const: allwinner,suniv-f1c200s
- const: allwinner,suniv-f1c100s
- description: SL631 Action Camera with IMX179
items:
- const: allwinner,sl631-imx179
@ -843,6 +856,11 @@ properties:
- const: wexler,tab7200
- const: allwinner,sun7i-a20
- description: MangoPi MQ-R board
items:
- const: widora,mangopi-mq-r-t113
- const: allwinner,sun8i-t113s
- description: WITS A31 Colombus Evaluation Board
items:
- const: wits,colombus

5
Documentation/devicetree/bindings/riscv/sunxi.yaml
View File

@ -64,6 +64,11 @@ properties:
- const: widora,mangopi-mq-pro
- const: allwinner,sun20i-d1
- description: MangoPi MQ-R board
items:
- const: widora,mangopi-mq-r-f133
- const: allwinner,sun20i-d1s
additionalProperties: true
...

4
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -725,6 +725,8 @@ patternProperties:
description: Lantiq Semiconductor
"^lattice,.*":
description: Lattice Semiconductor
"^lctech,.*":
description: Shenzen LC Technology Co., Ltd.
"^leadtek,.*":
description: Shenzhen Leadtek Technology Co., Ltd.
"^leez,.*":
@ -1249,6 +1251,8 @@ patternProperties:
description: Solomon Systech Limited
"^sony,.*":
description: Sony Corporation
"^sourceparts,.*":
description: Source Parts Inc.
"^spansion,.*":
description: Spansion Inc.
"^sparkfun,.*":

5
arch/arm/boot/dts/Makefile
View File

@ -1411,6 +1411,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-s3-elimo-initium.dtb \
sun8i-s3-lichee-zero-plus.dtb \
sun8i-s3-pinecube.dtb \
sun8i-t113s-mangopi-mq-r-t113.dtb \
sun8i-t3-cqa3t-bv3.dtb \
sun8i-v3-sl631-imx179.dtb \
sun8i-v3s-licheepi-zero.dtb \
@ -1420,7 +1421,9 @@ dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
sun9i-a80-cubieboard4.dtb
dtb-$(CONFIG_MACH_SUNIV) += \
suniv-f1c100s-licheepi-nano.dtb
suniv-f1c100s-licheepi-nano.dtb \
suniv-f1c200s-lctech-pi.dtb \
suniv-f1c200s-popstick-v1.1.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-acer-a500-picasso.dtb \
tegra20-asus-tf101.dtb \

12
arch/arm/boot/dts/sun6i-a31.dtsi
View File

@ -822,7 +822,7 @@
clocks = <&ccu CLK_APB2_UART0>;
resets = <&ccu RST_APB2_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -835,7 +835,7 @@
clocks = <&ccu CLK_APB2_UART1>;
resets = <&ccu RST_APB2_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -848,7 +848,7 @@
clocks = <&ccu CLK_APB2_UART2>;
resets = <&ccu RST_APB2_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -861,7 +861,7 @@
clocks = <&ccu CLK_APB2_UART3>;
resets = <&ccu RST_APB2_UART3>;
dmas = <&dma 9>, <&dma 9>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -874,7 +874,7 @@
clocks = <&ccu CLK_APB2_UART4>;
resets = <&ccu RST_APB2_UART4>;
dmas = <&dma 10>, <&dma 10>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -887,7 +887,7 @@
clocks = <&ccu CLK_APB2_UART5>;
resets = <&ccu RST_APB2_UART5>;
dmas = <&dma 22>, <&dma 22>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};

10
arch/arm/boot/dts/sun8i-a23-a33.dtsi
View File

@ -490,7 +490,7 @@
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -503,7 +503,7 @@
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -516,7 +516,7 @@
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -529,7 +529,7 @@
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
dmas = <&dma 9>, <&dma 9>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -542,7 +542,7 @@
clocks = <&ccu CLK_BUS_UART4>;
resets = <&ccu RST_BUS_UART4>;
dmas = <&dma 10>, <&dma 10>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};

35
arch/arm/boot/dts/sun8i-t113s-mangopi-mq-r-t113.dts Normal file
View File

@ -0,0 +1,35 @@
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
// Copyright (C) 2022 Arm Ltd.
#include <dt-bindings/interrupt-controller/irq.h>
/dts-v1/;
#include "sun8i-t113s.dtsi"
#include "sunxi-d1s-t113-mangopi-mq-r.dtsi"
/ {
model = "MangoPi MQ-R-T113";
compatible = "widora,mangopi-mq-r-t113", "allwinner,sun8i-t113s";
aliases {
ethernet0 = &rtl8189ftv;
};
};
&cpu0 {
cpu-supply = <&reg_vcc_core>;
};
&cpu1 {
cpu-supply = <&reg_vcc_core>;
};
&mmc1 {
rtl8189ftv: wifi@1 {
reg = <1>;
interrupt-parent = <&pio>;
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 = WL_WAKE_AP */
interrupt-names = "host-wake";
};
};

59
arch/arm/boot/dts/sun8i-t113s.dtsi Normal file
View File

@ -0,0 +1,59 @@
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
// Copyright (C) 2022 Arm Ltd.
#define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <riscv/allwinner/sunxi-d1s-t113.dtsi>
#include <riscv/allwinner/sunxi-d1-t113.dtsi>
/ {
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
};
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
};
};
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x03021000 0x1000>,
<0x03022000 0x2000>,
<0x03024000 0x2000>,
<0x03026000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-controller;
#interrupt-cells = <3>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
};

6
arch/arm/boot/dts/sun8i-v3s.dtsi
View File

@ -479,7 +479,7 @@
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
@ -492,7 +492,7 @@
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
@ -505,7 +505,7 @@
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART2>;
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";

16
arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
View File

@ -6,6 +6,8 @@
/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Lichee Pi Nano";
compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
@ -50,8 +52,22 @@
};
};
&otg_sram {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pe_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
status = "okay";
};

32
arch/arm/boot/dts/suniv-f1c100s.dtsi
View File

@ -133,6 +133,32 @@
#size-cells = <0>;
};
usb_otg: usb@1c13000 {
compatible = "allwinner,suniv-f1c100s-musb";
reg = <0x01c13000 0x0400>;
clocks = <&ccu CLK_BUS_OTG>;
resets = <&ccu RST_BUS_OTG>;
interrupts = <26>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
allwinner,sram = <&otg_sram 1>;
status = "disabled";
};
usbphy: phy@1c13400 {
compatible = "allwinner,suniv-f1c100s-usb-phy";
reg = <0x01c13400 0x10>;
reg-names = "phy_ctrl";
clocks = <&ccu CLK_USB_PHY0>;
clock-names = "usb0_phy";
resets = <&ccu RST_USB_PHY0>;
reset-names = "usb0_reset";
#phy-cells = <1>;
status = "disabled";
};
ccu: clock@1c20000 {
compatible = "allwinner,suniv-f1c100s-ccu";
reg = <0x01c20000 0x400>;
@ -181,6 +207,12 @@
pins = "PE0", "PE1";
function = "uart0";
};
/omit-if-no-ref/
uart1_pa_pins: uart1-pa-pins {
pins = "PA2", "PA3";
function = "uart1";
};
};
i2c0: i2c@1c27000 {

76
arch/arm/boot/dts/suniv-f1c200s-lctech-pi.dts Normal file
View File

@ -0,0 +1,76 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2022 Arm Ltd,
* based on work:
* Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
*/
/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Lctech Pi F1C200s";
compatible = "lctech,pi-f1c200s", "allwinner,suniv-f1c200s",
"allwinner,suniv-f1c100s";
aliases {
serial0 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
reg_vcc3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&mmc0 {
broken-cd;
bus-width = <4>;
disable-wp;
vmmc-supply = <&reg_vcc3v3>;
status = "okay";
};
&otg_sram {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pc_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pa_pins>;
status = "okay";
};
/*
* This is a Type-C socket, but CC1/2 are not connected, and VBUS is connected
* to Vin, which supplies the board. Host mode works (if the board is powered
* otherwise), but peripheral is probably the intention.
*/
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
status = "okay";
};

81
arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts Normal file
View File

@ -0,0 +1,81 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
*/
/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Popcorn Computer PopStick v1.1";
compatible = "sourceparts,popstick-v1.1", "sourceparts,popstick",
"allwinner,suniv-f1c200s", "allwinner,suniv-f1c100s";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>; /* PE6 */
linux,default-trigger = "heartbeat";
};
};
reg_vcc3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&mmc0 {
cd-gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */
bus-width = <4>;
disable-wp;
vmmc-supply = <&reg_vcc3v3>;
status = "okay";
};
&otg_sram {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pc_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pe_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
status = "okay";
};

126
arch/arm/boot/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi Normal file
View File

@ -0,0 +1,126 @@
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
// Copyright (C) 2022 Arm Ltd.
/*
* Common peripherals and configurations for MangoPi MQ-R boards.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
serial3 = &uart3;
};
chosen {
stdout-path = "serial3:115200n8";
};
leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 3 22 GPIO_ACTIVE_LOW>; /* PD22 */
};
};
/* board wide 5V supply directly from the USB-C socket */
reg_vcc5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "vcc-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
/* SY8008 DC/DC regulator on the board */
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_vcc5v>;
};
/* SY8008 DC/DC regulator on the board, also supplying VDD-SYS */
reg_vcc_core: regulator-core {
compatible = "regulator-fixed";
regulator-name = "vcc-core";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
vin-supply = <&reg_vcc5v>;
};
/* XC6206 LDO on the board */
reg_avdd2v8: regulator-avdd {
compatible = "regulator-fixed";
regulator-name = "avdd2v8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
vin-supply = <&reg_3v3>;
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
};
};
&dcxo {
clock-frequency = <24000000>;
};
&ehci1 {
status = "okay";
};
&mmc0 {
pinctrl-0 = <&mmc0_pins>;
pinctrl-names = "default";
vmmc-supply = <&reg_3v3>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-0 = <&mmc1_pins>;
pinctrl-names = "default";
vmmc-supply = <&reg_3v3>;
non-removable;
bus-width = <4>;
mmc-pwrseq = <&wifi_pwrseq>;
status = "okay";
};
&ohci1 {
status = "okay";
};
&pio {
vcc-pb-supply = <&reg_3v3>;
vcc-pd-supply = <&reg_3v3>;
vcc-pe-supply = <&reg_avdd2v8>;
vcc-pf-supply = <&reg_3v3>;
vcc-pg-supply = <&reg_3v3>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pb_pins>;
status = "okay";
};
/* The USB-C socket has its CC pins pulled to GND, so is hardwired as a UFP. */
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
usb1_vbus-supply = <&reg_vcc5v>;
status = "okay";
};

8
arch/arm/boot/dts/sunxi-h3-h5.dtsi
View File

@ -710,7 +710,7 @@
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -723,7 +723,7 @@
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -736,7 +736,7 @@
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -749,7 +749,7 @@
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
dmas = <&dma 9>, <&dma 9>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};

1
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
View File

@ -3,6 +3,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

72
arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts
View File

@ -1,6 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
/*
* gpio line names
*
* The Nezha-D1 has a 40-pin IO header. Some of these pins are routed
* directly to pads on the SoC, others come from an 8-bit pcf857x IO
* expander. Therefore, these line names are specified in two places:
* one set for the pcf857x, and one set for the pio controller.
*
* Lines which are routed to the 40-pin header are named as follows:
* <pin#> [<pin name>]
* where:
* <pin#> is the actual pin number of the 40-pin header
* <pin name> is the name of the pin by function/gpio#
*
* For details regarding pin numbers and names see the schematics (under
* "IO EXPAND"):
* http://dl.linux-sunxi.org/D1/D1_Nezha_development_board_schematic_diagram_20210224.pdf
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@ -90,6 +109,15 @@
gpio-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-line-names =
"pin13 [gpio8]",
"pin16 [gpio10]",
"pin18 [gpio11]",
"pin26 [gpio17]",
"pin22 [gpio14]",
"pin28 [gpio19]",
"pin37 [gpio23]",
"pin11 [gpio6]";
};
};
@ -164,3 +192,47 @@
usb1_vbus-supply = <&reg_vcc>;
status = "okay";
};
&pio {
gpio-line-names =
/* Port A */
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
/* Port B */
"pin5 [gpio2/twi2-sck]",
"pin3 [gpio1/twi2-sda]",
"",
"pin38 [gpio24/i2s2-din]",
"pin40 [gpio25/i2s2-dout]",
"pin12 [gpio7/i2s-clk]",
"pin35 [gpio22/i2s2-lrck]",
"",
"pin8 [gpio4/uart0-txd]",
"pin10 [gpio5/uart0-rxd]",
"",
"",
"pin15 [gpio9]",
"", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
/* Port C */
"",
"pin31 [gpio21]",
"", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
/* Port D */
"", "", "", "", "", "", "", "",
"", "",
"pin24 [gpio16/spi1-ce0]",
"pin23 [gpio15/spi1-clk]",
"pin19 [gpio12/spi1-mosi]",
"pin21 [gpio13/spi1-miso]",
"pin27 [gpio18/spi1-hold]",
"pin29 [gpio20/spi1-wp]",
"", "", "", "", "", "",
"pin7 [gpio3/pwm]";
};

24
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
View File

@ -211,7 +211,7 @@
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
dmas = <&dma 14>, <&dma 14>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -224,7 +224,7 @@
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
dmas = <&dma 15>, <&dma 15>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -237,7 +237,7 @@
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
dmas = <&dma 16>, <&dma 16>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -250,7 +250,7 @@
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
dmas = <&dma 17>, <&dma 17>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -263,7 +263,7 @@
clocks = <&ccu CLK_BUS_UART4>;
resets = <&ccu RST_BUS_UART4>;
dmas = <&dma 18>, <&dma 18>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -276,7 +276,7 @@
clocks = <&ccu CLK_BUS_UART5>;
resets = <&ccu RST_BUS_UART5>;
dmas = <&dma 19>, <&dma 19>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@ -367,6 +367,18 @@
#size-cells = <1>;
};
crypto: crypto@3040000 {
compatible = "allwinner,sun20i-d1-crypto";
reg = <0x3040000 0x800>;
interrupts = <SOC_PERIPHERAL_IRQ(52) IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CE>,
<&ccu CLK_CE>,
<&ccu CLK_MBUS_CE>,
<&rtc CLK_IOSC>;
clock-names = "bus", "mod", "ram", "trng";
resets = <&ccu RST_BUS_CE>;
};
mbus: dram-controller@3102000 {
compatible = "allwinner,sun20i-d1-mbus";
reg = <0x3102000 0x1000>,

1
scripts/dtc/include-prefixes/riscv Symbolic link
View File

@ -0,0 +1 @@
../../../arch/riscv/boot/dts