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drm/qxl: don't use ttm bo->offset 

This patch removes slot->gpu_offset which is not required as
VRAM and PRIV slot are in separate PCI bar.

This patch also removes unused qxl_bo_gpu_offset()

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/372934/
This commit is contained in:
Nirmoy Das 2020-06-24 20:26:45 +02:00 committed by Christian König
parent a0e4a29857
commit 8ef963ba2d
4 changed files with 4 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/qxl/qxl_drv.h
View File

@ -134,7 +134,6 @@ struct qxl_memslot {
uint64_t start_phys_addr;
uint64_t size;
uint64_t high_bits;
uint64_t gpu_offset;
};
enum {
@ -307,10 +306,9 @@ qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo,
(bo->tbo.mem.mem_type == TTM_PL_VRAM)
? &qdev->main_slot : &qdev->surfaces_slot;
WARN_ON_ONCE((bo->tbo.offset & slot->gpu_offset) != slot->gpu_offset);
/* TODO - need to hold one of the locks to read bo->tbo.mem.start */
/* TODO - need to hold one of the locks to read tbo.offset */
return slot->high_bits | (bo->tbo.offset - slot->gpu_offset + offset);
return slot->high_bits | ((bo->tbo.mem.start << PAGE_SHIFT) + offset);
}
/* qxl_display.c */

5
drivers/gpu/drm/qxl/qxl_kms.c
View File

@ -87,11 +87,10 @@ static void setup_slot(struct qxl_device *qdev,
high_bits <<= (64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits));
slot->high_bits = high_bits;
DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx, gpu_offset 0x%lx\n",
DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx\n",
slot->index, slot->name,
(unsigned long)slot->start_phys_addr,
(unsigned long)slot->size,
(unsigned long)slot->gpu_offset);
(unsigned long)slot->size);
}
void qxl_reinit_memslots(struct qxl_device *qdev)

5
drivers/gpu/drm/qxl/qxl_object.h
View File

@ -48,11 +48,6 @@ static inline void qxl_bo_unreserve(struct qxl_bo *bo)
ttm_bo_unreserve(&bo->tbo);
}
static inline u64 qxl_bo_gpu_offset(struct qxl_bo *bo)
{
return bo->tbo.offset;
}
static inline unsigned long qxl_bo_size(struct qxl_bo *bo)
{
return bo->tbo.num_pages << PAGE_SHIFT;

9
drivers/gpu/drm/qxl/qxl_ttm.c
View File

@ -51,11 +51,6 @@ static struct qxl_device *qxl_get_qdev(struct ttm_bo_device *bdev)
static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
struct ttm_mem_type_manager *man)
{
struct qxl_device *qdev = qxl_get_qdev(bdev);
unsigned int gpu_offset_shift =
64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits + 8);
struct qxl_memslot *slot;
switch (type) {
case TTM_PL_SYSTEM:
/* System memory */
@ -66,11 +61,7 @@ static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
case TTM_PL_VRAM:
case TTM_PL_PRIV:
/* "On-card" video ram */
slot = (type == TTM_PL_VRAM) ?
&qdev->main_slot : &qdev->surfaces_slot;
slot->gpu_offset = (uint64_t)type << gpu_offset_shift;
man->func = &ttm_bo_manager_func;
man->gpu_offset = slot->gpu_offset;
man->flags = TTM_MEMTYPE_FLAG_FIXED |
TTM_MEMTYPE_FLAG_MAPPABLE;
man->available_caching = TTM_PL_MASK_CACHING;