drm/amdgpu: Initialize dce_virtual_display_funcs.
For virtual display feature, initialize dce_virtual_display_funcs, which will be used in function dce_virtual_set_display_funcs. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -34,6 +34,97 @@
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static void dce_virtual_set_display_funcs(struct amdgpu_device *adev);
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static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev);
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/**
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* dce_virtual_vblank_wait - vblank wait asic callback.
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*
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* @adev: amdgpu_device pointer
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* @crtc: crtc to wait for vblank on
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*
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* Wait for vblank on the requested crtc (evergreen+).
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*/
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static void dce_virtual_vblank_wait(struct amdgpu_device *adev, int crtc)
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{
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return;
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}
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static u32 dce_virtual_vblank_get_counter(struct amdgpu_device *adev, int crtc)
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{
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if (crtc >= adev->mode_info.num_crtc)
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return 0;
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else
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return adev->ddev->vblank[crtc].count;
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}
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static void dce_virtual_page_flip(struct amdgpu_device *adev,
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int crtc_id, u64 crtc_base, bool async)
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{
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return;
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}
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static int dce_virtual_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,
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u32 *vbl, u32 *position)
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{
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if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc))
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return -EINVAL;
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*vbl = 0;
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*position = 0;
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return 0;
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}
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static bool dce_virtual_hpd_sense(struct amdgpu_device *adev,
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enum amdgpu_hpd_id hpd)
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{
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return true;
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}
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static void dce_virtual_hpd_set_polarity(struct amdgpu_device *adev,
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enum amdgpu_hpd_id hpd)
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{
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return;
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}
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static u32 dce_virtual_hpd_get_gpio_reg(struct amdgpu_device *adev)
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{
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return 0;
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}
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static bool dce_virtual_is_display_hung(struct amdgpu_device *adev)
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{
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return false;
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}
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void dce_virtual_stop_mc_access(struct amdgpu_device *adev,
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struct amdgpu_mode_mc_save *save)
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{
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return;
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}
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void dce_virtual_resume_mc_access(struct amdgpu_device *adev,
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struct amdgpu_mode_mc_save *save)
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{
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return;
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}
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void dce_virtual_set_vga_render_state(struct amdgpu_device *adev,
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bool render)
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{
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return;
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}
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/**
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* dce_virtual_bandwidth_update - program display watermarks
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*
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* @adev: amdgpu_device pointer
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*
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* Calculate and program the display watermarks and line
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* buffer allocation (CIK).
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*/
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static void dce_virtual_bandwidth_update(struct amdgpu_device *adev)
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{
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return;
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}
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static const struct drm_crtc_funcs dce_virtual_crtc_funcs = {
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.cursor_set2 = NULL,
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.cursor_move = NULL,
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@ -253,23 +344,127 @@ const struct amd_ip_funcs dce_virtual_ip_funcs = {
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.set_powergating_state = dce_virtual_set_powergating_state,
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};
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/* these are handled by the primary encoders */
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static void dce_virtual_encoder_prepare(struct drm_encoder *encoder)
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{
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return;
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}
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static void dce_virtual_encoder_commit(struct drm_encoder *encoder)
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{
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return;
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}
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static void
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dce_virtual_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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return;
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}
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static void dce_virtual_encoder_disable(struct drm_encoder *encoder)
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{
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return;
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}
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static void
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dce_virtual_encoder_dpms(struct drm_encoder *encoder, int mode)
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{
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return;
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}
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static bool dce_virtual_encoder_mode_fixup(struct drm_encoder *encoder,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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/* set the active encoder to connector routing */
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amdgpu_encoder_set_active_device(encoder);
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return true;
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}
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static const struct drm_encoder_helper_funcs dce_virtual_encoder_helper_funcs = {
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.dpms = dce_virtual_encoder_dpms,
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.mode_fixup = dce_virtual_encoder_mode_fixup,
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.prepare = dce_virtual_encoder_prepare,
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.mode_set = dce_virtual_encoder_mode_set,
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.commit = dce_virtual_encoder_commit,
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.disable = dce_virtual_encoder_disable,
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};
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static void dce_virtual_encoder_destroy(struct drm_encoder *encoder)
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{
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struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
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kfree(amdgpu_encoder->enc_priv);
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drm_encoder_cleanup(encoder);
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kfree(amdgpu_encoder);
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}
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static const struct drm_encoder_funcs dce_virtual_encoder_funcs = {
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.destroy = dce_virtual_encoder_destroy,
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};
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static void dce_virtual_encoder_add(struct amdgpu_device *adev,
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uint32_t encoder_enum,
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uint32_t supported_device,
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u16 caps)
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{
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struct drm_device *dev = adev->ddev;
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struct drm_encoder *encoder;
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struct amdgpu_encoder *amdgpu_encoder;
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/* see if we already added it */
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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amdgpu_encoder = to_amdgpu_encoder(encoder);
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if (amdgpu_encoder->encoder_enum == encoder_enum) {
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amdgpu_encoder->devices |= supported_device;
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return;
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}
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}
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/* add a new one */
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amdgpu_encoder = kzalloc(sizeof(struct amdgpu_encoder), GFP_KERNEL);
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if (!amdgpu_encoder)
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return;
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encoder = &amdgpu_encoder->base;
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encoder->possible_crtcs = 0x1;
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amdgpu_encoder->enc_priv = NULL;
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amdgpu_encoder->encoder_enum = encoder_enum;
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amdgpu_encoder->encoder_id = (encoder_enum & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
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amdgpu_encoder->devices = supported_device;
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amdgpu_encoder->rmx_type = RMX_OFF;
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amdgpu_encoder->underscan_type = UNDERSCAN_OFF;
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amdgpu_encoder->is_ext_encoder = false;
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amdgpu_encoder->caps = caps;
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drm_encoder_init(dev, encoder, &dce_virtual_encoder_funcs,
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DRM_MODE_ENCODER_VIRTUAL, NULL);
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drm_encoder_helper_add(encoder, &dce_virtual_encoder_helper_funcs);
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DRM_INFO("[FM]encoder: %d is VIRTUAL\n", amdgpu_encoder->encoder_id);
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}
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static const struct amdgpu_display_funcs dce_virtual_display_funcs = {
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.set_vga_render_state = NULL,
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.bandwidth_update = NULL,
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.vblank_get_counter = NULL,
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.vblank_wait = NULL,
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.is_display_hung = NULL,
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.set_vga_render_state = &dce_virtual_set_vga_render_state,
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.bandwidth_update = &dce_virtual_bandwidth_update,
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.vblank_get_counter = &dce_virtual_vblank_get_counter,
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.vblank_wait = &dce_virtual_vblank_wait,
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.is_display_hung = &dce_virtual_is_display_hung,
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.backlight_set_level = NULL,
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.backlight_get_level = NULL,
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.hpd_sense = NULL,
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.hpd_set_polarity = NULL,
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.hpd_get_gpio_reg = NULL,
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.page_flip = NULL,
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.page_flip_get_scanoutpos = NULL,
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.add_encoder = NULL,
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.hpd_sense = &dce_virtual_hpd_sense,
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.hpd_set_polarity = &dce_virtual_hpd_set_polarity,
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.hpd_get_gpio_reg = &dce_virtual_hpd_get_gpio_reg,
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.page_flip = &dce_virtual_page_flip,
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.page_flip_get_scanoutpos = &dce_virtual_crtc_get_scanoutpos,
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.add_encoder = &dce_virtual_encoder_add,
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.add_connector = &amdgpu_connector_add,
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.stop_mc_access = NULL,
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.resume_mc_access = NULL,
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.stop_mc_access = &dce_virtual_stop_mc_access,
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.resume_mc_access = &dce_virtual_resume_mc_access,
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};
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static void dce_virtual_set_display_funcs(struct amdgpu_device *adev)
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@ -305,4 +500,3 @@ static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev)
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adev->hpd_irq.funcs = &dce_virtual_hpd_irq_funcs;
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}
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