[MTD] [NAND] Remember timing settings for CAFÉ NAND controller.
We'll need them for suspend/resume. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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@ -530,7 +530,6 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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{
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struct mtd_info *mtd;
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struct cafe_priv *cafe;
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uint32_t timing1, timing2, timing3;
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uint32_t ctrl;
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int err = 0;
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@ -587,21 +586,19 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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}
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if (numtimings == 3) {
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timing1 = timing[0];
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timing2 = timing[1];
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timing3 = timing[2];
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cafe_dev_dbg(&cafe->pdev->dev, "Using provided timings (%08x %08x %08x)\n",
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timing1, timing2, timing3);
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timing[0], timing[1], timing[2]);
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} else {
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timing1 = cafe_readl(cafe, NAND_TIMING1);
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timing2 = cafe_readl(cafe, NAND_TIMING2);
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timing3 = cafe_readl(cafe, NAND_TIMING3);
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timing[0] = cafe_readl(cafe, NAND_TIMING1);
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timing[1] = cafe_readl(cafe, NAND_TIMING2);
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timing[2] = cafe_readl(cafe, NAND_TIMING3);
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if (timing1 | timing2 | timing3) {
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cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n", timing1, timing2, timing3);
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if (timing[0] | timing[1] | timing[2]) {
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cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n",
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timing[0], timing[1], timing[2]);
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} else {
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dev_warn(&cafe->pdev->dev, "Timing registers unset; using most conservative defaults\n");
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timing1 = timing2 = timing3 = 0xffffffff;
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timing[0] = timing[1] = timing[2] = 0xffffffff;
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}
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}
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@ -609,9 +606,9 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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cafe_writel(cafe, 1, NAND_RESET);
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cafe_writel(cafe, 0, NAND_RESET);
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cafe_writel(cafe, timing1, NAND_TIMING1);
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cafe_writel(cafe, timing2, NAND_TIMING2);
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cafe_writel(cafe, timing3, NAND_TIMING3);
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cafe_writel(cafe, timing[0], NAND_TIMING1);
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cafe_writel(cafe, timing[1], NAND_TIMING2);
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cafe_writel(cafe, timing[2], NAND_TIMING3);
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cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
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err = request_irq(pdev->irq, &cafe_nand_interrupt, IRQF_SHARED,
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