Merge branch 'for-3.6/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren <swarren@wwwdotorg.org>:
This branch contains various minor cleanups, such as binding and .dts
renames, DT content cleanup, SDHCI support-8bit property usage cleanup, and
removal of some unnecessary sleep code.
* 'for-3.6/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra: rename board files to match SoC
ASoC: tegra: simplify Kconfig dependencies
ARM: dt: tegra: remove legacy support-8bit property
mmc: tegra: use bus-width property instead of support-8bit
ARM: tegra: Remove flow controller programming
dt: name all Tegra binding docs consistently
ARM: tegra20: Rename "emc" to "memory-controller"
ARM: dt: tegra20: Rename "emc" to "memory-controller"
ARM: tegra{20,30}: Rename "mc" to "memory-controller"
ARM: dt: tegra{20,30}.dtsi: Rename "mc" to "memory-controller"
amba: tegra-ahb: Remove empty *_remove()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
8e31cbc66b
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@ -15,7 +15,7 @@ Child device nodes describe the memory settings for different configurations and
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Example:
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emc@7000f400 {
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memory-controller@7000f400 {
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#address-cells = < 1 >;
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#size-cells = < 0 >;
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compatible = "nvidia,tegra20-emc";
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@ -8,7 +8,7 @@ Required properties:
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- interrupts : Should contain MC General interrupt.
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Example:
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mc {
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memory-controller@0x7000f000 {
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compatible = "nvidia,tegra20-mc";
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reg = <0x7000f000 0x024
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0x7000f03c 0x3c4>;
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@ -8,7 +8,7 @@ Required properties:
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- interrupts : Should contain MC General interrupt.
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Example:
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mc {
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memory-controller {
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compatible = "nvidia,tegra30-mc";
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reg = <0x7000f000 0x010
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0x7000f03c 0x1b4
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@ -307,7 +307,6 @@
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cd-gpios = <&gpio 58 0>; /* gpio PH2 */
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wp-gpios = <&gpio 59 0>; /* gpio PH3 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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support-8bit;
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bus-width = <8>;
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};
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@ -301,7 +301,6 @@
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sdhci@c8000600 {
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status = "okay";
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support-8bit;
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bus-width = <8>;
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};
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@ -334,7 +334,7 @@
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};
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};
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emc {
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memory-controller@0x7000f400 {
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emc-table@190000 {
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reg = <190000>;
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compatible = "nvidia,tegra20-emc-table";
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@ -397,7 +397,6 @@
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sdhci@c8000600 {
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status = "okay";
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support-8bit;
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bus-width = <8>;
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};
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@ -314,7 +314,6 @@
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sdhci@c8000600 {
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status = "okay";
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support-8bit;
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bus-width = <8>;
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};
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@ -164,7 +164,7 @@
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reg = <0x7000e400 0x400>;
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};
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mc {
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memory-controller@0x7000f000 {
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compatible = "nvidia,tegra20-mc";
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reg = <0x7000f000 0x024
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0x7000f03c 0x3c4>;
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@ -177,7 +177,7 @@
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0x58000000 0x02000000>; /* GART aperture */
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};
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emc {
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memory-controller@0x7000f400 {
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compatible = "nvidia,tegra20-emc";
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reg = <0x7000f400 0x200>;
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#address-cells = <1>;
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@ -144,7 +144,6 @@
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sdhci@78000600 {
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status = "okay";
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support-8bit;
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bus-width = <8>;
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};
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@ -167,7 +167,7 @@
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reg = <0x7000e400 0x400>;
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};
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mc {
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memory-controller {
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compatible = "nvidia,tegra30-mc";
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reg = <0x7000f000 0x010
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0x7000f03c 0x1b4
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@ -63,7 +63,6 @@ comment "Tegra board type"
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config MACH_HARMONY
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bool "Harmony board"
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depends on ARCH_TEGRA_2x_SOC
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select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
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help
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Support for nVidia Harmony development platform
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@ -71,7 +70,6 @@ config MACH_KAEN
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bool "Kaen board"
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depends on ARCH_TEGRA_2x_SOC
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select MACH_SEABOARD
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select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
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help
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Support for the Kaen version of Seaboard
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@ -84,7 +82,6 @@ config MACH_PAZ00
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config MACH_SEABOARD
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bool "Seaboard board"
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depends on ARCH_TEGRA_2x_SOC
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select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
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help
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Support for nVidia Seaboard development platform. It will
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also be included for some of the derivative boards that
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@ -2,9 +2,9 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000
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params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
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initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
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dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
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dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb
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dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
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dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb
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dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb
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dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra-cardhu.dtb
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dtb-$(CONFIG_MACH_HARMONY) += tegra20-harmony.dtb
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dtb-$(CONFIG_MACH_PAZ00) += tegra20-paz00.dtb
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dtb-$(CONFIG_MACH_SEABOARD) += tegra20-seaboard.dtb
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dtb-$(CONFIG_MACH_TRIMSLICE) += tegra20-trimslice.dtb
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dtb-$(CONFIG_MACH_VENTANA) += tegra20-ventana.dtb
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dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb
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@ -27,9 +27,9 @@
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#include <linux/cpuidle.h>
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#include <linux/hrtimer.h>
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#include <mach/iomap.h>
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#include <asm/proc-fns.h>
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extern void tegra_cpu_wfi(void);
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#include <mach/iomap.h>
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static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index);
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@ -64,7 +64,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
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enter = ktime_get();
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tegra_cpu_wfi();
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cpu_do_idle();
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exit = ktime_sub(ktime_get(), enter);
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us = ktime_to_us(exit);
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@ -62,32 +62,3 @@
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movw \reg, #:lower16:\val
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movt \reg, #:upper16:\val
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.endm
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/*
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* tegra_cpu_wfi
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*
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* puts current CPU in clock-gated wfi using the flow controller
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*
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* corrupts r0-r3
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* must be called with MMU on
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*/
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ENTRY(tegra_cpu_wfi)
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cpu_id r0
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cpu_to_halt_reg r1, r0
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cpu_to_csr_reg r2, r0
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mov32 r0, TEGRA_FLOW_CTRL_VIRT
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mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
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str r3, [r0, r2] @ clear event & interrupt status
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mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME
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str r3, [r0, r1] @ put flow controller in wait irq mode
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dsb
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wfi
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mov r3, #0
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str r3, [r0, r1] @ clear flow controller halt status
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mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
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str r3, [r0, r2] @ clear event & interrupt status
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dsb
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mov pc, lr
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ENDPROC(tegra_cpu_wfi)
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@ -264,11 +264,6 @@ static int __devinit tegra_ahb_probe(struct platform_device *pdev)
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return 0;
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}
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static int __devexit tegra_ahb_remove(struct platform_device *pdev)
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{
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return 0;
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}
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static const struct of_device_id tegra_ahb_of_match[] __devinitconst = {
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{ .compatible = "nvidia,tegra30-ahb", },
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{ .compatible = "nvidia,tegra20-ahb", },
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@ -277,7 +272,6 @@ static const struct of_device_id tegra_ahb_of_match[] __devinitconst = {
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static struct platform_driver tegra_ahb_driver = {
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.probe = tegra_ahb_probe,
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.remove = __devexit_p(tegra_ahb_remove),
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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@ -223,6 +223,7 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata(
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{
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struct tegra_sdhci_platform_data *plat;
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struct device_node *np = pdev->dev.of_node;
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u32 bus_width;
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if (!np)
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return NULL;
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@ -236,7 +237,9 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata(
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plat->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
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plat->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
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plat->power_gpio = of_get_named_gpio(np, "power-gpios", 0);
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if (of_find_property(np, "support-8bit", NULL))
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if (of_property_read_u32(np, "bus-width", &bus_width) == 0 &&
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bus_width == 8)
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plat->is_8bit = 1;
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return plat;
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@ -58,17 +58,9 @@ config SND_SOC_TEGRA_WM8753
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Say Y or M here if you want to add support for SoC audio on Tegra
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boards using the WM8753 codec, such as Whistler.
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config MACH_HAS_SND_SOC_TEGRA_WM8903
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bool
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help
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Machines that use the SND_SOC_TEGRA_WM8903 driver should select
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this config option, in order to allow the user to enable
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SND_SOC_TEGRA_WM8903.
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config SND_SOC_TEGRA_WM8903
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tristate "SoC Audio support for Tegra boards using a WM8903 codec"
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depends on SND_SOC_TEGRA && I2C
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depends on MACH_HAS_SND_SOC_TEGRA_WM8903
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select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC
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select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC
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select SND_SOC_WM8903
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@ -79,7 +71,7 @@ config SND_SOC_TEGRA_WM8903
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config SND_SOC_TEGRA_TRIMSLICE
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tristate "SoC Audio support for TrimSlice board"
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depends on SND_SOC_TEGRA && MACH_TRIMSLICE && I2C
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depends on SND_SOC_TEGRA && I2C
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select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC
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select SND_SOC_TLV320AIC23
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help
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