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Support for the rk3399-based Pinebook Pro, eDP support and power-tree for 

the rk3399 evaluation board, a big number of fixes for issues found by
 checking against the new yaml dt-bindings.
 And on the smaller side, fixes for network transfers, the mute gpio
 on rk3328 gets actually described and one lvds fix on the px30 and
 the rk3399-hugsun board gets IR and power led.
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Merge tag 'v5.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Support for the rk3399-based Pinebook Pro, eDP support and power-tree for
the rk3399 evaluation board, a big number of fixes for issues found by
checking against the new yaml dt-bindings.
And on the smaller side, fixes for network transfers, the mute gpio
on rk3328 gets actually described and one lvds fix on the px30 and
the rk3399-hugsun board gets IR and power led.

* tag 'v5.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits)
  arm64: dts: rockchip: Add Hugsun X99 power led
  arm64: dts: rockchip: Add Hugsun X99 IR receiver
  arm64: dts: rockchip: remove clock-names property from 'generic-ohci' nodes
  arm64: dts: rockchip: remove clock-names property from 'generic-ehci' nodes
  arm64: dts: rockchip: remove properties from spdif node RK3399 Excavator
  arm64: dts: add bus to rockchip amba nodenames
  arm64: dts: rockchip: replace clock-freq-min-max by max-frequency
  arm64: dts: rockchip: fix vqmmc-supply property name for rk3399 puma
  arm64: dts: remove no-emmc from mmc node for Rockchip PX5 EVB
  arm64: dts: rockchip: remove rockchip,grf from vop nodes for px30
  arm64: dts: rockchip: remove max-freq from &spi1 node for Hugsun X99
  arm64: dts: rockchip: fix compatible property for rk3399-evb
  arm64: dts: rockchip: Add initial support for Pinebook Pro
  dt-bindings: Add doc for Pine64 Pinebook Pro
  arm64: dts: rockchip: Enable eDP display on rk3399 evb
  arm64: dts: rockchip: remove enable-gpio of backlight on rk3399 evb
  arm64: dts: rockchip: Add pmic dt tree for rk3399 evb
  arm64: dts: rockchip: remove dvs2 pinctrl for pmic on rk3399 evb
  arm64: dts: rockchip: fix px30 lvds ports
  arm64: dts: rockchip: Add txpbl node for RK3399/RK3328
  ...

Link: https://lore.kernel.org/r/27799037.pT45f1LVdF@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-03-25 22:01:56 +01:00
parent 20d9c47b80 68c33366a9
commit 8e2d11360d
20 changed files with 1469 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Documentation/devicetree/bindings/arm/rockchip.yaml
View File

@ -402,6 +402,11 @@ properties:
- const: phytec,rk3288-phycore-som
- const: rockchip,rk3288
- description: Pine64 PinebookPro
items:
- const: pine64,pinebook-pro
- const: rockchip,rk3399
- description: Pine64 Rock64
items:
- const: pine64,rock64

1
arch/arm64/boot/dts/rockchip/Makefile
View File

@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb

30
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@ -413,27 +413,30 @@
lvds: lvds {
compatible = "rockchip,px30-lvds";
#address-cells = <1>;
#size-cells = <0>;
phys = <&dsi_dphy>;
phy-names = "dphy";
rockchip,grf = <&grf>;
rockchip,output = "lvds";
status = "disabled";
port@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
lvds_vopb_in: endpoint@0 {
port@0 {
reg = <0>;
remote-endpoint = <&vopb_out_lvds>;
};
#address-cells = <1>;
#size-cells = <0>;
lvds_vopl_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_lvds>;
lvds_vopb_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_lvds>;
};
lvds_vopl_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_lvds>;
};
};
};
};
@ -700,7 +703,7 @@
clock-names = "pclk", "timer";
};
amba {
amba: bus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@ -870,7 +873,6 @@
g-np-tx-fifo-size = <16>;
g-rx-fifo-size = <280>;
g-tx-fifo-size = <256 128 128 64 32 16>;
g-use-dma;
phys = <&u2phy_otg>;
phy-names = "usb2-phy";
power-domains = <&power PX30_PD_USB>;
@ -882,7 +884,6 @@
reg = <0x0 0xff340000 0x0 0x10000>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST>;
clock-names = "usbhost";
phys = <&u2phy_host>;
phy-names = "usb";
power-domains = <&power PX30_PD_USB>;
@ -894,7 +895,6 @@
reg = <0x0 0xff350000 0x0 0x10000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST>;
clock-names = "usbhost";
phys = <&u2phy_host>;
phy-names = "usb";
power-domains = <&power PX30_PD_USB>;
@ -1031,7 +1031,6 @@
reset-names = "axi", "ahb", "dclk";
iommus = <&vopb_mmu>;
power-domains = <&power PX30_PD_VO>;
rockchip,grf = <&grf>;
status = "disabled";
vopb_out: port {
@ -1073,7 +1072,6 @@
reset-names = "axi", "ahb", "dclk";
iommus = <&vopl_mmu>;
power-domains = <&power PX30_PD_VO>;
rockchip,grf = <&grf>;
status = "disabled";
vopl_out: port {

10
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View File

@ -40,7 +40,7 @@
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a35", "arm,armv8";
compatible = "arm,cortex-a35";
reg = <0x0 0x0>;
enable-method = "psci";
clocks = <&cru ARMCLK>;
@ -53,7 +53,7 @@
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a35", "arm,armv8";
compatible = "arm,cortex-a35";
reg = <0x0 0x1>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
@ -63,7 +63,7 @@
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a35", "arm,armv8";
compatible = "arm,cortex-a35";
reg = <0x0 0x2>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
@ -73,7 +73,7 @@
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a35", "arm,armv8";
compatible = "arm,cortex-a35";
reg = <0x0 0x3>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
@ -513,7 +513,7 @@
status = "disabled";
};
amba {
amba: bus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;

1
arch/arm64/boot/dts/rockchip/rk3328-a1.dts
View File

@ -60,6 +60,7 @@
};
&codec {
mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>;
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
View File

@ -104,6 +104,7 @@
};
&codec {
mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>;
status = "okay";
port@0 {

7
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@ -142,7 +142,7 @@
};
};
amba {
amba: bus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@ -906,6 +906,7 @@
resets = <&cru SRST_GMAC2IO_A>;
reset-names = "stmmaceth";
rockchip,grf = <&grf>;
snps,txpbl = <0x4>;
status = "disabled";
};
@ -927,6 +928,7 @@
reset-names = "stmmaceth", "mac-phy";
phy-mode = "rmii";
phy-handle = <&phy>;
snps,txpbl = <0x4>;
status = "disabled";
mdio {
@ -957,7 +959,6 @@
g-np-tx-fifo-size = <16>;
g-rx-fifo-size = <280>;
g-tx-fifo-size = <256 128 128 64 32 16>;
g-use-dma;
phys = <&u2phy_otg>;
phy-names = "usb2-phy";
status = "disabled";
@ -968,7 +969,6 @@
reg = <0x0 0xff5c0000 0x0 0x10000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>, <&u2phy>;
clock-names = "usbhost", "utmi";
phys = <&u2phy_host>;
phy-names = "usb";
status = "disabled";
@ -979,7 +979,6 @@
reg = <0x0 0xff5d0000 0x0 0x10000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>, <&u2phy>;
clock-names = "usbhost", "utmi";
phys = <&u2phy_host>;
phy-names = "usb";
status = "disabled";

1
arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
View File

@ -239,7 +239,6 @@
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
no-emmc;
no-sdio;
sd-uhs-sdr12;
sd-uhs-sdr25;

3
arch/arm64/boot/dts/rockchip/rk3368.dtsi
View File

@ -136,7 +136,7 @@
};
};
amba {
amba: bus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@ -513,7 +513,6 @@
reg = <0x0 0xff500000 0x0 0x100>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>;
clock-names = "usbhost";
status = "disabled";
};

270
arch/arm64/boot/dts/rockchip/rk3399-evb.dts
View File

@ -9,8 +9,7 @@
/ {
model = "Rockchip RK3399 Evaluation Board";
compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
"google,rk3399evb-rev2";
compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
backlight: backlight {
compatible = "pwm-backlight";
@ -48,10 +47,22 @@
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
pwms = <&pwm0 0 25000 0>;
};
edp_panel: edp-panel {
compatible ="lg,lp079qx1-sp0v";
backlight = <&backlight>;
enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
power-supply = <&vcc3v3_s0>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
@ -114,6 +125,24 @@
};
&edp {
status = "okay";
force-hpd;
ports {
edp_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
edp_out_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&emmc_phy {
status = "okay";
};
@ -134,6 +163,228 @@
status = "okay";
};
&i2c0 {
status = "okay";
rk808: pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
interrupt-parent = <&gpio1>;
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
vcc10-supply = <&vcc3v3_sys>;
vcc11-supply = <&vcc3v3_sys>;
vcc12-supply = <&vcc3v3_sys>;
vddio-supply = <&vcc1v8_pmu>;
regulators {
vdd_log: DCDC_REG1 {
regulator-name = "vdd_log";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vdd_cpu_l: DCDC_REG2 {
regulator-name = "vdd_cpu_l";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_1v8: DCDC_REG4 {
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc1v8_dvp: LDO_REG1 {
regulator-name = "vcc1v8_dvp";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v0_tp: LDO_REG2 {
regulator-name = "vcc3v0_tp";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc1v8_pmu: LDO_REG3 {
regulator-name = "vcc1v8_pmu";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_sd: LDO_REG4 {
regulator-name = "vcc_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3000000>;
};
};
vcca3v0_codec: LDO_REG5 {
regulator-name = "vcca3v0_codec";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v5: LDO_REG6 {
regulator-name = "vcc_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1500000>;
};
};
vcca1v8_codec: LDO_REG7 {
regulator-name = "vcca1v8_codec";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v0: LDO_REG8 {
regulator-name = "vcc_3v0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3000000>;
};
};
vcc3v3_s3: SWITCH_REG1 {
regulator-name = "vcc3v3_s3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc3v3_s0: SWITCH_REG2 {
regulator-name = "vcc3v3_s0";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
vdd_cpu_b: regulator@40 {
compatible = "silergy,syr827";
reg = <0x40>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_b";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1500000>;
regulator-ramp-delay = <1000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: regulator@41 {
compatible = "silergy,syr828";
reg = <0x41>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_gpu";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1500000>;
regulator-ramp-delay = <1000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&pwm0 {
status = "okay";
};
@ -210,11 +461,6 @@
rockchip,pins =
<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
pmic_dvs2: pmic-dvs2 {
rockchip,pins =
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb2 {
@ -224,3 +470,11 @@
};
};
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};

4
arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
View File

@ -291,11 +291,9 @@ ap_i2c_tp: &i2c5 {
#pwm-cells = <1>;
};
usbc_extcon1: extcon@1 {
usbc_extcon1: extcon1 {
compatible = "google,extcon-usbc-cros-ec";
google,usb-port-id = <1>;
#extcon-cells = <0>;
};
};

4
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
View File

@ -570,11 +570,9 @@ ap_i2c_audio: &i2c8 {
#size-cells = <0>;
};
usbc_extcon0: extcon@0 {
usbc_extcon0: extcon0 {
compatible = "google,extcon-usbc-cros-ec";
google,usb-port-id = <0>;
#extcon-cells = <0>;
};
};
};

39
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
View File

@ -29,6 +29,26 @@
regulator-max-microvolt = <5000000>;
};
ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_rx>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&power_led_gpio>;
led-0 {
label = "blue:power";
gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "default-on";
};
};
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@ -483,6 +503,18 @@
};
};
ir {
ir_rx: ir-rx {
rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>;
};
};
leds {
power_led_gpio: power-led-gpio {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
@ -539,10 +571,6 @@
};
};
&pwm0 {
status = "okay";
};
&pwm2 {
status = "okay";
pinctrl-0 = <&pwm2_pin_pull_down>;
@ -555,7 +583,7 @@
&sdmmc {
clock-frequency = <150000000>;
clock-freq-min-max = <200000 150000000>;
max-frequency = <150000000>;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
@ -610,7 +638,6 @@
&spi1 {
status = "okay";
max-freq = <10000000>;
flash@0 {
compatible = "jedec,spi-nor";

43
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
View File

@ -202,14 +202,27 @@
clock_in_out = "input";
phy-supply = <&vcc3v3_s3>;
phy-mode = "rgmii";
phy-handle = <&rtl8211e>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
tx_delay = <0x28>;
rx_delay = <0x11>;
status = "okay";
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
rtl8211e: phy@1 {
reg = <1>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
};
};
&gpu {
@ -419,6 +432,8 @@
compatible = "silergy,syr827";
reg = <0x40>;
fcs,suspend-voltage-selector = <1>;
pinctrl-names = "default";
pinctrl-0 = <&cpu_b_sleep>;
regulator-name = "vdd_cpu_b";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1500000>;
@ -436,6 +451,8 @@
compatible = "silergy,syr828";
reg = <0x41>;
fcs,suspend-voltage-selector = <1>;
pinctrl-names = "default";
pinctrl-0 = <&gpu_sleep>;
regulator-name = "vdd_gpu";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1500000>;
@ -537,7 +554,25 @@
};
};
phy {
phy_intb: phy-intb {
rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rstb: phy-rstb {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
cpu_b_sleep: cpu-b-sleep {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
};
gpu_sleep: gpu-sleep {
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
};
pmic_int_l: pmic-int-l {
rockchip,pins =
<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;

1096
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts Normal file
View File

File diff suppressed because it is too large Load Diff

2
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
View File

@ -480,7 +480,7 @@
};
&sdmmc {
vqmmc = <&vcc_sd>;
vqmmc-supply = <&vcc_sd>;
};
&spi1 {

2
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
View File

@ -542,7 +542,7 @@
cap-mmc-highspeed;
cap-sd-highspeed;
clock-frequency = <100000000>;
clock-freq-min-max = <100000 100000000>;
max-frequency = <100000000>;
cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
disable-wp;
sd-uhs-sdr104;

2
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
View File

@ -230,7 +230,5 @@
};
&spdif {
i2c-scl-rising-time-ns = <450>;
i2c-scl-falling-time-ns = <15>;
status = "okay";
};

11
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@ -197,7 +197,7 @@
#clock-cells = <0>;
};
amba {
amba: bus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@ -288,6 +288,7 @@
resets = <&cru SRST_A_GMAC>;
reset-names = "stmmaceth";
rockchip,grf = <&grf>;
snps,txpbl = <0x4>;
status = "disabled";
};
@ -349,8 +350,6 @@
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
<&u2phy0>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy0_host>;
phy-names = "usb";
status = "disabled";
@ -362,8 +361,6 @@
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
<&u2phy0>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy0_host>;
phy-names = "usb";
status = "disabled";
@ -375,8 +372,6 @@
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
<&u2phy1>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy1_host>;
phy-names = "usb";
status = "disabled";
@ -388,8 +383,6 @@
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
<&u2phy1>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy1_host>;
phy-names = "usb";
status = "disabled";

3
arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
View File

@ -13,5 +13,6 @@
/ {
model = "Radxa ROCK Pi N10";
compatible = "radxa,rockpi-n10", "rockchip,rk3399pro";
compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som",
"rockchip,rk3399pro";
};