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drm/i915: Use ilk_compute_wm_level to compute WM_PIPE values 

Unify the code a bit to use ilk_compute_wm_level for all watermark
levels.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Ville Syrjälä 2013-08-30 14:30:24 +03:00 committed by Daniel Vetter
parent ac830fe1c3
commit 8de123a5d8
1 changed files with 21 additions and 23 deletions
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44
drivers/gpu/drm/i915/intel_pm.c
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@ -2463,33 +2463,31 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
return ilk_check_wm(level, max, result);
}
static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
enum pipe pipe,
static uint32_t hsw_compute_wm_pipe(struct drm_device *dev,
const struct hsw_pipe_wm_parameters *params)
{
uint32_t pri_val, cur_val, spr_val;
/* WM0 latency values stored in 0.1us units */
uint16_t pri_latency = dev_priv->wm.pri_latency[0];
uint16_t spr_latency = dev_priv->wm.spr_latency[0];
uint16_t cur_latency = dev_priv->wm.cur_latency[0];
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_wm_config config = {
.num_pipes_active = 1,
.sprites_enabled = params->spr.enabled,
.sprites_scaled = params->spr.scaled,
};
struct hsw_wm_maximums max;
struct intel_wm_level res;
pri_val = ilk_compute_pri_wm(params, pri_latency, false);
spr_val = ilk_compute_spr_wm(params, spr_latency);
cur_val = ilk_compute_cur_wm(params, cur_latency);
if (!params->active)
return 0;
WARN(pri_val > 127,
"Primary WM error, mode not supported for pipe %c\n",
pipe_name(pipe));
WARN(spr_val > 127,
"Sprite WM error, mode not supported for pipe %c\n",
pipe_name(pipe));
WARN(cur_val > 63,
"Cursor WM error, mode not supported for pipe %c\n",
pipe_name(pipe));
ilk_wm_max(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
return (pri_val << WM0_PIPE_PLANE_SHIFT) |
(spr_val << WM0_PIPE_SPRITE_SHIFT) |
cur_val;
ilk_compute_wm_level(dev_priv, 0, params, &res);
ilk_check_wm(0, &max, &res);
return (res.pri_val << WM0_PIPE_PLANE_SHIFT) |
(res.spr_val << WM0_PIPE_SPRITE_SHIFT) |
res.cur_val;
}
static uint32_t
@ -2718,7 +2716,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
}
for_each_pipe(pipe)
results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev_priv, pipe,
results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev,
&params[pipe]);
for_each_pipe(pipe) {