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arm: dts: fix unit-address leading 0s 

Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Rob Herring 2017-10-13 12:54:51 -05:00 committed by Arnd Bergmann
parent 59b630878d
commit 8dccafaa28
203 changed files with 1249 additions and 1249 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/boot/dts/armada-370-synology-ds213j.dts
View File

@ -316,32 +316,32 @@
* change the default environment, unless you know
* what you are doing.
*/
partition@00000000 { /* u-boot */
partition@0 { /* u-boot */
label = "RedBoot";
reg = <0x00000000 0x000c0000>; /* 768KB */
};
partition@000c0000 { /* uImage */
partition@c0000 { /* uImage */
label = "zImage";
reg = <0x000c0000 0x002d0000>; /* 2880KB */
};
partition@00390000 { /* uInitramfs */
partition@390000 { /* uInitramfs */
label = "rd.gz";
reg = <0x00390000 0x00440000>; /* 4250KB */
};
partition@007d0000 { /* MAC address and serial number */
partition@7d0000 { /* MAC address and serial number */
label = "vendor";
reg = <0x007d0000 0x00010000>; /* 64KB */
};
partition@007e0000 {
partition@7e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>; /* 64KB */
};
partition@007f0000 {
partition@7f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>; /* 64KB */
};

12
arch/arm/boot/dts/armada-385-synology-ds116.dts
View File

@ -267,35 +267,35 @@
* enumerated. The MAC address and the serial number are listed
* in the "vendor" partition.
*/
partition@00000000 {
partition@0 {
label = "RedBoot";
reg = <0x00000000 0x000f0000>;
read-only;
};
partition@000c0000 {
partition@c0000 {
label = "zImage";
reg = <0x000f0000 0x002d0000>;
};
partition@00390000 {
partition@390000 {
label = "rd.gz";
reg = <0x003c0000 0x00410000>;
};
partition@007d0000 {
partition@7d0000 {
label = "vendor";
reg = <0x007d0000 0x00010000>;
read-only;
};
partition@007e0000 {
partition@7e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>;
read-only;
};
partition@007f0000 {
partition@7f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>;
read-only;

12
arch/arm/boot/dts/armada-xp-synology-ds414.dts
View File

@ -332,32 +332,32 @@
* change the default environment, unless you know
* what you are doing.
*/
partition@00000000 { /* u-boot */
partition@0 { /* u-boot */
label = "RedBoot";
reg = <0x00000000 0x000d0000>; /* 832KB */
};
partition@000c0000 { /* uImage */
partition@c0000 { /* uImage */
label = "zImage";
reg = <0x000d0000 0x002d0000>; /* 2880KB */
};
partition@003a0000 { /* uInitramfs */
partition@3a0000 { /* uInitramfs */
label = "rd.gz";
reg = <0x003a0000 0x00430000>; /* 4250KB */
};
partition@007d0000 { /* MAC address and serial number */
partition@7d0000 { /* MAC address and serial number */
label = "vendor";
reg = <0x007d0000 0x00010000>; /* 64KB */
};
partition@007e0000 {
partition@7e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>; /* 64KB */
};
partition@007f0000 {
partition@7f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>; /* 64KB */
};

2
arch/arm/boot/dts/aspeed-g4.dtsi
View File

@ -109,7 +109,7 @@
clock-frequency = <192000000>;
};
clk_apb: clk_apb@08 {
clk_apb: clk_apb@8 {
#clock-cells = <0>;
compatible = "aspeed,g4-apb-clock", "fixed-clock";
reg = <0x08>;

2
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@ -144,7 +144,7 @@
clock-frequency = <198000000>;
};
clk_apb: clk_apb@08 {
clk_apb: clk_apb@8 {
#clock-cells = <0>;
compatible = "aspeed,g5-apb-clock", "fixed-clock";
reg = <0x08>;

4
arch/arm/boot/dts/at91-ariag25.dts
View File

@ -147,12 +147,12 @@
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91-ariettag25.dts
View File

@ -58,12 +58,12 @@
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91-cosino_mega2560.dts
View File

@ -62,7 +62,7 @@
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
@ -71,7 +71,7 @@
>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91-kizbox2.dts
View File

@ -133,11 +133,11 @@
};
};
usb1: ohci@00600000 {
usb1: ohci@600000 {
status = "okay";
};
usb2: ehci@00700000 {
usb2: ehci@700000 {
status = "okay";
};

4
arch/arm/boot/dts/at91-kizboxmini.dts
View File

@ -59,12 +59,12 @@
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
num-ports = <1>;
status = "okay";
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
View File

@ -58,14 +58,14 @@
};
ahb {
usb0: gadget@00300000 {
usb0: gadget@300000 {
atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00400000 {
usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioA PIN_PD20 GPIO_ACTIVE_HIGH */
&pioA PIN_PA27 GPIO_ACTIVE_HIGH
@ -76,7 +76,7 @@
status = "okay";
};
usb2: ehci@00500000 {
usb2: ehci@500000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View File

@ -67,14 +67,14 @@
};
ahb {
usb0: gadget@00300000 {
usb0: gadget@300000 {
atmel,vbus-gpio = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00400000 {
usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioA PIN_PB9 GPIO_ACTIVE_HIGH */
&pioA PIN_PB10 GPIO_ACTIVE_HIGH
@ -85,7 +85,7 @@
status = "okay";
};
usb2: ehci@00500000 {
usb2: ehci@500000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d3_xplained.dts
View File

@ -235,14 +235,14 @@
};
};
usb0: gadget@00500000 {
usb0: gadget@500000 {
atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00600000 {
usb1: ohci@600000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 3 GPIO_ACTIVE_LOW
@ -251,7 +251,7 @@
status = "okay";
};
usb2: ehci@00700000 {
usb2: ehci@700000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts
View File

@ -21,14 +21,14 @@
};
ahb {
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 11 GPIO_ACTIVE_LOW
@ -37,7 +37,7 @@
status = "okay";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d4_xplained.dts
View File

@ -170,14 +170,14 @@
};
};
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 11 GPIO_ACTIVE_HIGH
@ -186,7 +186,7 @@
status = "okay";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d4ek.dts
View File

@ -216,14 +216,14 @@
};
};
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioE 10 GPIO_ACTIVE_LOW */
&pioE 11 GPIO_ACTIVE_LOW
@ -232,7 +232,7 @@
status = "okay";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-vinco.dts
View File

@ -180,14 +180,14 @@
};
};
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "disable";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 11 GPIO_ACTIVE_LOW
@ -196,7 +196,7 @@
status = "disable";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
/* 4G Modem */
status = "okay";
};

4
arch/arm/boot/dts/at91rm9200.dtsi
View File

@ -66,7 +66,7 @@
};
};
sram: sram@00200000 {
sram: sram@200000 {
compatible = "mmio-sram";
reg = <0x00200000 0x4000>;
};
@ -938,7 +938,7 @@
status = "disabled";
};
usb0: ohci@00300000 {
usb0: ohci@300000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00300000 0x100000>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91rm9200ek.dts
View File

@ -78,7 +78,7 @@
};
};
usb0: ohci@00300000 {
usb0: ohci@300000 {
num-ports = <2>;
status = "okay";
};

2
arch/arm/boot/dts/at91sam9260.dtsi
View File

@ -69,7 +69,7 @@
};
};
sram0: sram@002ff000 {
sram0: sram@2ff000 {
compatible = "mmio-sram";
reg = <0x002ff000 0x2000>;
};

4
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -60,7 +60,7 @@
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x28000>;
};
@ -71,7 +71,7 @@
#size-cells = <1>;
ranges;
usb0: ohci@00500000 {
usb0: ohci@500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91sam9261ek.dts
View File

@ -32,7 +32,7 @@
};
ahb {
usb0: ohci@00500000 {
usb0: ohci@500000 {
status = "okay";
};

6
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -62,12 +62,12 @@
};
};
sram0: sram@00300000 {
sram0: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x14000>;
};
sram1: sram@00500000 {
sram1: sram@500000 {
compatible = "mmio-sram";
reg = <0x00500000 0x4000>;
};
@ -1010,7 +1010,7 @@
status = "disabled";
};
usb0: ohci@00a00000 {
usb0: ohci@a00000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91sam9263ek.dts
View File

@ -191,7 +191,7 @@
};
};
usb0: ohci@00a00000 {
usb0: ohci@a00000 {
num-ports = <2>;
status = "okay";
atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH

4
arch/arm/boot/dts/at91sam9g20.dtsi
View File

@ -16,11 +16,11 @@
reg = <0x20000000 0x08000000>;
};
sram0: sram@002ff000 {
sram0: sram@2ff000 {
status = "disabled";
};
sram1: sram@002fc000 {
sram1: sram@2fc000 {
compatible = "mmio-sram";
reg = <0x002fc000 0x8000>;
};

6
arch/arm/boot/dts/at91sam9g45.dtsi
View File

@ -74,7 +74,7 @@
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x10000>;
};
@ -1313,7 +1313,7 @@
status = "disabled";
};
usb0: ohci@00700000 {
usb0: ohci@700000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
@ -1322,7 +1322,7 @@
status = "disabled";
};
usb1: ehci@00800000 {
usb1: ehci@800000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;

4
arch/arm/boot/dts/at91sam9m10g45ek.dts
View File

@ -290,14 +290,14 @@
};
};
usb0: ohci@00700000 {
usb0: ohci@700000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
&pioD 3 GPIO_ACTIVE_LOW>;
};
usb1: ehci@00800000 {
usb1: ehci@800000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91sam9n12.dtsi
View File

@ -64,7 +64,7 @@
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x8000>;
};
@ -1018,7 +1018,7 @@
};
};
usb0: ohci@00500000 {
usb0: ohci@500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x00100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91sam9n12ek.dts
View File

@ -169,7 +169,7 @@
};
};
usb0: ohci@00500000 {
usb0: ohci@500000 {
num-ports = <1>;
atmel,vbus-gpio = <&pioB 7 GPIO_ACTIVE_LOW>;
status = "okay";

4
arch/arm/boot/dts/at91sam9rl.dtsi
View File

@ -70,7 +70,7 @@
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x10000>;
};
@ -81,7 +81,7 @@
#size-cells = <1>;
ranges;
fb0: fb@00500000 {
fb0: fb@500000 {
compatible = "atmel,at91sam9rl-lcdc";
reg = <0x00500000 0x1000>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;

2
arch/arm/boot/dts/at91sam9rlek.dts
View File

@ -32,7 +32,7 @@
};
ahb {
fb0: fb@00500000 {
fb0: fb@500000 {
display = <&display0>;
status = "okay";

6
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -72,7 +72,7 @@
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x8000>;
};
@ -1231,7 +1231,7 @@
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
@ -1240,7 +1240,7 @@
status = "disabled";
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;

4
arch/arm/boot/dts/at91sam9x5ek.dtsi
View File

@ -134,7 +134,7 @@
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
@ -143,7 +143,7 @@
>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91sam9xe.dtsi
View File

@ -49,11 +49,11 @@
model = "Atmel AT91SAM9XE family SoC";
compatible = "atmel,at91sam9xe", "atmel,at91sam9260";
sram0: sram@002ff000 {
sram0: sram@2ff000 {
status = "disabled";
};
sram1: sram@00300000 {
sram1: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x4000>;
};

10
arch/arm/boot/dts/bcm-cygnus.dtsi
View File

@ -96,14 +96,14 @@
#address-cells = <1>;
#size-cells = <1>;
otp: otp@0301c800 {
otp: otp@301c800 {
compatible = "brcm,ocotp";
reg = <0x0301c800 0x2c>;
brcm,ocotp-size = <2048>;
status = "disabled";
};
pcie_phy: phy@0301d0a0 {
pcie_phy: phy@301d0a0 {
compatible = "brcm,cygnus-pcie-phy";
reg = <0x0301d0a0 0x14>;
#address-cells = <1>;
@ -120,7 +120,7 @@
};
};
pinctrl: pinctrl@0301d0c8 {
pinctrl: pinctrl@301d0c8 {
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x30>,
<0x0301d24c 0x2c>;
@ -141,7 +141,7 @@
};
};
mailbox: mailbox@03024024 {
mailbox: mailbox@3024024 {
compatible = "brcm,iproc-mailbox";
reg = <0x03024024 0x40>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
@ -150,7 +150,7 @@
#mbox-cells = <1>;
};
gpio_crmu: gpio@03024800 {
gpio_crmu: gpio@3024800 {
compatible = "brcm,cygnus-crmu-gpio";
reg = <0x03024800 0x50>,
<0x03024008 0x18>;

8
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@ -75,7 +75,7 @@
#address-cells = <1>;
#size-cells = <1>;
a9pll: arm_clk@00000 {
a9pll: arm_clk@0 {
#clock-cells = <0>;
compatible = "brcm,nsp-armpll";
clocks = <&osc>;
@ -164,7 +164,7 @@
#address-cells = <1>;
#size-cells = <1>;
gpioa: gpio@0020 {
gpioa: gpio@20 {
compatible = "brcm,nsp-gpio-a";
reg = <0x0020 0x70>,
<0x3f1c4 0x1c>;
@ -176,7 +176,7 @@
gpio-ranges = <&pinctrl 0 0 32>;
};
uart0: serial@0300 {
uart0: serial@300 {
compatible = "ns16550a";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@ -184,7 +184,7 @@
status = "disabled";
};
uart1: serial@0400 {
uart1: serial@400 {
compatible = "ns16550a";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

6
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -24,7 +24,7 @@
#address-cells = <1>;
#size-cells = <1>;
uart0: serial@0300 {
uart0: serial@300 {
compatible = "ns16550";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@ -32,7 +32,7 @@
status = "disabled";
};
uart1: serial@0400 {
uart1: serial@400 {
compatible = "ns16550";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@ -47,7 +47,7 @@
#address-cells = <1>;
#size-cells = <1>;
a9pll: arm_clk@00000 {
a9pll: arm_clk@0 {
#clock-cells = <0>;
compatible = "brcm,nsp-armpll";
clocks = <&osc>;

2
arch/arm/boot/dts/bcm53573.dtsi
View File

@ -107,7 +107,7 @@
gpio-controller;
#gpio-cells = <2>;
uart0: serial@0300 {
uart0: serial@300 {
compatible = "ns16550a";
reg = <0x0300 0x100>;
interrupt-parent = <&gic>;

6
arch/arm/boot/dts/berlin2.dtsi
View File

@ -202,7 +202,7 @@
ranges = <0 0xe80000 0x10000>;
interrupt-parent = <&aic>;
gpio0: gpio@0400 {
gpio0: gpio@400 {
compatible = "snps,dw-apb-gpio";
reg = <0x0400 0x400>;
#address-cells = <1>;
@ -220,7 +220,7 @@
};
};
gpio1: gpio@0800 {
gpio1: gpio@800 {
compatible = "snps,dw-apb-gpio";
reg = <0x0800 0x400>;
#address-cells = <1>;
@ -238,7 +238,7 @@
};
};
gpio2: gpio@0c00 {
gpio2: gpio@c00 {
compatible = "snps,dw-apb-gpio";
reg = <0x0c00 0x400>;
#address-cells = <1>;

6
arch/arm/boot/dts/berlin2cd.dtsi
View File

@ -182,7 +182,7 @@
ranges = <0 0xe80000 0x10000>;
interrupt-parent = <&aic>;
gpio0: gpio@0400 {
gpio0: gpio@400 {
compatible = "snps,dw-apb-gpio";
reg = <0x0400 0x400>;
#address-cells = <1>;
@ -200,7 +200,7 @@
};
};
gpio1: gpio@0800 {
gpio1: gpio@800 {
compatible = "snps,dw-apb-gpio";
reg = <0x0800 0x400>;
#address-cells = <1>;
@ -218,7 +218,7 @@
};
};
gpio2: gpio@0c00 {
gpio2: gpio@c00 {
compatible = "snps,dw-apb-gpio";
reg = <0x0c00 0x400>;
#address-cells = <1>;

6
arch/arm/boot/dts/berlin2q.dtsi
View File

@ -234,7 +234,7 @@
ranges = <0 0xe80000 0x10000>;
interrupt-parent = <&aic>;
gpio0: gpio@0400 {
gpio0: gpio@400 {
compatible = "snps,dw-apb-gpio";
reg = <0x0400 0x400>;
#address-cells = <1>;
@ -252,7 +252,7 @@
};
};
gpio1: gpio@0800 {
gpio1: gpio@800 {
compatible = "snps,dw-apb-gpio";
reg = <0x0800 0x400>;
#address-cells = <1>;
@ -270,7 +270,7 @@
};
};
gpio2: gpio@0c00 {
gpio2: gpio@c00 {
compatible = "snps,dw-apb-gpio";
reg = <0x0c00 0x400>;
#address-cells = <1>;

14
arch/arm/boot/dts/dove.dtsi
View File

@ -456,25 +456,25 @@
};
};
thermal: thermal-diode@001c {
thermal: thermal-diode@1c {
compatible = "marvell,dove-thermal";
reg = <0x001c 0x0c>, <0x005c 0x08>;
};
gate_clk: clock-gating-ctrl@0038 {
gate_clk: clock-gating-ctrl@38 {
compatible = "marvell,dove-gating-clock";
reg = <0x0038 0x4>;
clocks = <&core_clk 0>;
#clock-cells = <1>;
};
divider_clk: core-clock@0064 {
divider_clk: core-clock@64 {
compatible = "marvell,dove-divider-clock";
reg = <0x0064 0x8>;
#clock-cells = <1>;
};
pinctrl: pin-ctrl@0200 {
pinctrl: pin-ctrl@200 {
compatible = "marvell,dove-pinctrl";
reg = <0x0200 0x14>,
<0x0440 0x04>;
@ -718,13 +718,13 @@
};
};
core_clk: core-clocks@0214 {
core_clk: core-clocks@214 {
compatible = "marvell,dove-core-clock";
reg = <0x0214 0x4>;
#clock-cells = <1>;
};
gpio0: gpio-ctrl@0400 {
gpio0: gpio-ctrl@400 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
gpio-controller;
@ -736,7 +736,7 @@
interrupts = <12>, <13>, <14>, <60>;
};
gpio1: gpio-ctrl@0420 {
gpio1: gpio-ctrl@420 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
gpio-controller;

2
arch/arm/boot/dts/ep7211-edb7211.dts
View File

@ -75,7 +75,7 @@
};
&bus {
flash: nor@00000000 {
flash: nor@0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <2>;

2
arch/arm/boot/dts/exynos3250-artik5.dtsi
View File

@ -29,7 +29,7 @@
reg = <0x40000000 0x1ff00000>;
};
firmware@0205f000 {
firmware@205f000 {
compatible = "samsung,secure-firmware";
reg = <0x0205f000 0x1000>;
};

2
arch/arm/boot/dts/exynos3250-monk.dts
View File

@ -32,7 +32,7 @@
reg = <0x40000000 0x1ff00000>;
};
firmware@0205F000 {
firmware@205f000 {
compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>;
};

2
arch/arm/boot/dts/exynos3250-rinato.dts
View File

@ -32,7 +32,7 @@
reg = <0x40000000 0x1ff00000>;
};
firmware@0205F000 {
firmware@205f000 {
compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>;
};

2
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -122,7 +122,7 @@
};
};
sysram@02020000 {
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;
#address-cells = <1>;

4
arch/arm/boot/dts/exynos4.dtsi
View File

@ -55,7 +55,7 @@
serial3 = &serial_3;
};
clock_audss: clock-controller@03810000 {
clock_audss: clock-controller@3810000 {
compatible = "samsung,exynos4210-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
@ -64,7 +64,7 @@
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};
i2s0: i2s@03830000 {
i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";
reg = <0x03830000 0x100>;
clocks = <&clock_audss EXYNOS_I2S_BUS>,

2
arch/arm/boot/dts/exynos4210-pinctrl.dtsi
View File

@ -843,7 +843,7 @@
};
};
pinctrl@03860000 {
pinctrl@3860000 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;

2
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@ -31,7 +31,7 @@
stdout-path = &serial_2;
};
sysram@02020000 {
sysram@2020000 {
smp-sysram@0 {
status = "disabled";
};

4
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -64,7 +64,7 @@
};
};
sysram: sysram@02020000 {
sysram: sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x20000>;
#address-cells = <1>;
@ -151,7 +151,7 @@
};
};
pinctrl_2: pinctrl@03860000 {
pinctrl_2: pinctrl@3860000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x03860000 0x1000>;
};

2
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
View File

@ -26,7 +26,7 @@
reg = <0x40000000 0x40000000>;
};
firmware@0203F000 {
firmware@203f000 {
compatible = "samsung,secure-firmware";
reg = <0x0203F000 0x1000>;
};

6
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View File

@ -20,7 +20,7 @@
stdout-path = &serial_1;
};
firmware@0204F000 {
firmware@204f000 {
compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>;
};
@ -253,7 +253,7 @@
samsung,i2c-max-bus-freq = <400000>;
status = "okay";
usb3503: usb3503@08 {
usb3503: usb3503@8 {
compatible = "smsc,usb3503";
reg = <0x08>;
@ -263,7 +263,7 @@
initial-mode = <1>;
};
max77686: pmic@09 {
max77686: pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_NONE>;

2
arch/arm/boot/dts/exynos4412-origen.dts
View File

@ -32,7 +32,7 @@
stdout-path = &serial_2;
};
firmware@0203F000 {
firmware@203f000 {
compatible = "samsung,secure-firmware";
reg = <0x0203F000 0x1000>;
};

2
arch/arm/boot/dts/exynos4412-pinctrl.dtsi
View File

@ -899,7 +899,7 @@
};
};
pinctrl_2: pinctrl@03860000 {
pinctrl_2: pinctrl@3860000 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;

6
arch/arm/boot/dts/exynos4412-trats2.dts
View File

@ -40,7 +40,7 @@
stdout-path = &serial_2;
};
firmware@0204F000 {
firmware@204f000 {
compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>;
};
@ -206,7 +206,7 @@
#size-cells = <0>;
status = "okay";
ak8975@0c {
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>;
@ -587,7 +587,7 @@
pinctrl-names = "default";
status = "okay";
max77686: max77686_pmic@09 {
max77686: max77686_pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx0>;
interrupts = <7 IRQ_TYPE_NONE>;

2
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -150,7 +150,7 @@
};
};
sysram@02020000 {
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;
#address-cells = <1>;

2
arch/arm/boot/dts/exynos5250-smdk5250.dts
View File

@ -129,7 +129,7 @@
reg = <0x50>;
};
max77686@09 {
max77686@9 {
compatible = "maxim,max77686";
reg = <0x09>;
interrupt-parent = <&gpx3>;

2
arch/arm/boot/dts/exynos5250-snow-common.dtsi
View File

@ -281,7 +281,7 @@
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
max77686: max77686@09 {
max77686: max77686@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_NONE>;

6
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -93,7 +93,7 @@
};
soc: soc {
sysram@02020000 {
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x30000>;
#address-cells = <1>;
@ -219,7 +219,7 @@
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_3: pinctrl@03860000 {
pinctrl_3: pinctrl@3860000 {
compatible = "samsung,exynos5250-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
@ -475,7 +475,7 @@
status = "disabled";
};
i2s0: i2s@03830000 {
i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";
status = "disabled";
reg = <0x03830000 0x100>;

6
arch/arm/boot/dts/exynos5410-odroidxu.dts
View File

@ -54,7 +54,7 @@
#clock-cells = <0>;
};
firmware@02073000 {
firmware@2073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
@ -164,7 +164,7 @@
samsung,i2c-max-bus-freq = <400000>;
status = "okay";
usb3503: usb-hub@08 {
usb3503: usb-hub@8 {
compatible = "smsc,usb3503";
reg = <0x08>;
@ -178,7 +178,7 @@
refclk-frequency = <24000000>;
};
max77802: pmic@09 {
max77802: pmic@9 {
compatible = "maxim,max77802";
reg = <0x9>;
interrupt-parent = <&gpx0>;

2
arch/arm/boot/dts/exynos5410-smdk5410.dts
View File

@ -32,7 +32,7 @@
#clock-cells = <0>;
};
firmware@02037000 {
firmware@2037000 {
compatible = "samsung,secure-firmware";
reg = <0x02037000 0x1000>;
};

4
arch/arm/boot/dts/exynos5410.dtsi
View File

@ -187,7 +187,7 @@
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_3: pinctrl@03860000 {
pinctrl_3: pinctrl@3860000 {
compatible = "samsung,exynos5410-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
@ -223,7 +223,7 @@
};
};
audi2s0: i2s@03830000 {
audi2s0: i2s@3830000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x03830000 0x100>;
dmas = <&pdma0 10

2
arch/arm/boot/dts/exynos5420-arndale-octa.dts
View File

@ -30,7 +30,7 @@
bootargs = "console=ttySAC3,115200";
};
firmware@02073000 {
firmware@2073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};

6
arch/arm/boot/dts/exynos5420.dtsi
View File

@ -352,7 +352,7 @@
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_4: pinctrl@03860000 {
pinctrl_4: pinctrl@3860000 {
compatible = "samsung,exynos5420-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
@ -365,7 +365,7 @@
interrupt-parent = <&gic>;
ranges;
adma: adma@03880000 {
adma: adma@3880000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x03880000 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
@ -429,7 +429,7 @@
};
};
i2s0: i2s@03830000 {
i2s0: i2s@3830000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x03830000 0x100>;
dmas = <&adma 0

2
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
View File

@ -29,7 +29,7 @@
stdout-path = "serial2:115200n8";
};
firmware@02073000 {
firmware@2073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};

2
arch/arm/boot/dts/exynos5440-ssdk5440.dts
View File

@ -56,7 +56,7 @@
samsung,spi-feedback-delay = <0>;
};
partition@00000 {
partition@0 {
label = "BootLoader";
reg = <0x60000 0x80000>;
read-only;

2
arch/arm/boot/dts/exynos5440.dtsi
View File

@ -196,7 +196,7 @@
clock-names = "watchdog";
};
gmac: ethernet@00230000 {
gmac: ethernet@230000 {
compatible = "snps,dwmac-3.70a", "snps,dwmac";
reg = <0x00230000 0x8000>;
interrupt-parent = <&gic>;

2
arch/arm/boot/dts/exynos54xx.dtsi
View File

@ -29,7 +29,7 @@
};
soc: soc {
sysram@02020000 {
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x54000>;
#address-cells = <1>;

2
arch/arm/boot/dts/ge863-pro3.dtsi
View File

@ -50,7 +50,7 @@
reg = <0x0 0x7c0000>;
};
root@07c0000 {
root@7c0000 {
label = "root";
reg = <0x7c0000 0x7840000>;
};

4
arch/arm/boot/dts/hip01.dtsi
View File

@ -91,14 +91,14 @@
reboot-offset = <0x4>;
};
global_timer@0a000200 {
global_timer@a000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x0a000200 0x100>;
interrupts = <1 11 0xf04>;
clocks = <&hisi_refclk144mhz>;
};
local_timer@0a000600 {
local_timer@a000600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x0a000600 0x100>;
interrupts = <1 13 0xf04>;

2
arch/arm/boot/dts/hip04-d01.dts
View File

@ -18,7 +18,7 @@
model = "Hisilicon D01 Development Board";
compatible = "hisilicon,hip04-d01";
memory@00000000,10000000 {
memory@0,10000000 {
device_type = "memory";
reg = <0x00000000 0x10000000 0x00000000 0xc0000000>,
<0x00000004 0xc0000000 0x00000003 0x40000000>;

30
arch/arm/boot/dts/hisi-x5hd2.dtsi
View File

@ -39,7 +39,7 @@
compatible = "simple-bus";
ranges;
timer0: timer@00002000 {
timer0: timer@2000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x00002000 0x1000>;
/* timer00 & timer01 */
@ -48,7 +48,7 @@
status = "disabled";
};
timer1: timer@00a29000 {
timer1: timer@a29000 {
/*
* Only used in NORMAL state, not available ins
* SLOW or DOZE state.
@ -62,7 +62,7 @@
status = "disabled";
};
timer2: timer@00a2a000 {
timer2: timer@a2a000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x00a2a000 0x1000>;
/* timer20 & timer21 */
@ -71,7 +71,7 @@
status = "disabled";
};
timer3: timer@00a2b000 {
timer3: timer@a2b000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x00a2b000 0x1000>;
/* timer30 & timer31 */
@ -80,7 +80,7 @@
status = "disabled";
};
timer4: timer@00a81000 {
timer4: timer@a81000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x00a81000 0x1000>;
/* timer30 & timer31 */
@ -89,7 +89,7 @@
status = "disabled";
};
uart0: uart@00b00000 {
uart0: uart@b00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b00000 0x1000>;
interrupts = <0 49 4>;
@ -98,7 +98,7 @@
status = "disabled";
};
uart1: uart@00006000 {
uart1: uart@6000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00006000 0x1000>;
interrupts = <0 50 4>;
@ -107,7 +107,7 @@
status = "disabled";
};
uart2: uart@00b02000 {
uart2: uart@b02000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b02000 0x1000>;
interrupts = <0 51 4>;
@ -116,7 +116,7 @@
status = "disabled";
};
uart3: uart@00b03000 {
uart3: uart@b03000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b03000 0x1000>;
interrupts = <0 52 4>;
@ -125,7 +125,7 @@
status = "disabled";
};
uart4: uart@00b04000 {
uart4: uart@b04000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb04000 0x1000>;
interrupts = <0 53 4>;
@ -199,7 +199,7 @@
status = "disabled";
};
gpio5: gpio@004000 {
gpio5: gpio@4000 {
compatible = "arm,pl061", "arm,primecell";
reg = <0x004000 0x1000>;
interrupts = <0 113 0x4>;
@ -378,7 +378,7 @@
};
};
local_timer@00a00600 {
local_timer@a00600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x00a00600 0x20>;
interrupts = <1 13 0xf01>;
@ -392,7 +392,7 @@
cache-level = <2>;
};
sysctrl: system-controller@00000000 {
sysctrl: system-controller@0 {
compatible = "hisilicon,sysctrl", "syscon";
reg = <0x00000000 0x1000>;
};
@ -404,7 +404,7 @@
mask = <0xdeadbeef>;
};
cpuctrl@00a22000 {
cpuctrl@a22000 {
compatible = "hisilicon,cpuctrl";
#address-cells = <1>;
#size-cells = <1>;
@ -489,7 +489,7 @@
clocks = <&clock HIX5HD2_SATA_CLK>;
};
ir: ir@001000 {
ir: ir@1000 {
compatible = "hisilicon,hix5hd2-ir";
reg = <0x001000 0x1000>;
interrupts = <0 47 4>;

44
arch/arm/boot/dts/imx1.dtsi
View File

@ -40,7 +40,7 @@
spi1 = &cspi2;
};
aitc: aitc-interrupt-controller@00223000 {
aitc: aitc-interrupt-controller@223000 {
compatible = "fsl,imx1-aitc", "fsl,avic";
interrupt-controller;
#interrupt-cells = <1>;
@ -69,14 +69,14 @@
interrupt-parent = <&aitc>;
ranges;
aipi@00200000 {
aipi@200000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x00200000 0x10000>;
ranges;
gpt1: timer@00202000 {
gpt1: timer@202000 {
compatible = "fsl,imx1-gpt";
reg = <0x00202000 0x1000>;
interrupts = <59>;
@ -85,7 +85,7 @@
clock-names = "ipg", "per";
};
gpt2: timer@00203000 {
gpt2: timer@203000 {
compatible = "fsl,imx1-gpt";
reg = <0x00203000 0x1000>;
interrupts = <58>;
@ -94,7 +94,7 @@
clock-names = "ipg", "per";
};
fb: fb@00205000 {
fb: fb@205000 {
compatible = "fsl,imx1-fb";
reg = <0x00205000 0x1000>;
interrupts = <14>;
@ -105,7 +105,7 @@
status = "disabled";
};
uart1: serial@00206000 {
uart1: serial@206000 {
compatible = "fsl,imx1-uart";
reg = <0x00206000 0x1000>;
interrupts = <30 29 26>;
@ -115,7 +115,7 @@
status = "disabled";
};
uart2: serial@00207000 {
uart2: serial@207000 {
compatible = "fsl,imx1-uart";
reg = <0x00207000 0x1000>;
interrupts = <24 23 20>;
@ -125,7 +125,7 @@
status = "disabled";
};
pwm: pwm@00208000 {
pwm: pwm@208000 {
#pwm-cells = <2>;
compatible = "fsl,imx1-pwm";
reg = <0x00208000 0x1000>;
@ -135,7 +135,7 @@
clock-names = "ipg", "per";
};
dma: dma@00209000 {
dma: dma@209000 {
compatible = "fsl,imx1-dma";
reg = <0x00209000 0x1000>;
interrupts = <61 60>;
@ -145,7 +145,7 @@
#dma-cells = <1>;
};
uart3: serial@0020a000 {
uart3: serial@20a000 {
compatible = "fsl,imx1-uart";
reg = <0x0020a000 0x1000>;
interrupts = <54 4 1>;
@ -156,14 +156,14 @@
};
};
aipi@00210000 {
aipi@210000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x00210000 0x10000>;
ranges;
cspi1: cspi@00213000 {
cspi1: cspi@213000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-cspi";
@ -175,7 +175,7 @@
status = "disabled";
};
i2c: i2c@00217000 {
i2c: i2c@217000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-i2c";
@ -185,7 +185,7 @@
status = "disabled";
};
cspi2: cspi@00219000 {
cspi2: cspi@219000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-cspi";
@ -197,20 +197,20 @@
status = "disabled";
};
clks: ccm@0021b000 {
clks: ccm@21b000 {
compatible = "fsl,imx1-ccm";
reg = <0x0021b000 0x1000>;
#clock-cells = <1>;
};
iomuxc: iomuxc@0021c000 {
iomuxc: iomuxc@21c000 {
compatible = "fsl,imx1-iomuxc";
reg = <0x0021c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio1: gpio@0021c000 {
gpio1: gpio@21c000 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c000 0x100>;
interrupts = <11>;
@ -220,7 +220,7 @@
#interrupt-cells = <2>;
};
gpio2: gpio@0021c100 {
gpio2: gpio@21c100 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c100 0x100>;
interrupts = <12>;
@ -230,7 +230,7 @@
#interrupt-cells = <2>;
};
gpio3: gpio@0021c200 {
gpio3: gpio@21c200 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c200 0x100>;
interrupts = <13>;
@ -240,7 +240,7 @@
#interrupt-cells = <2>;
};
gpio4: gpio@0021c300 {
gpio4: gpio@21c300 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c300 0x100>;
interrupts = <62>;
@ -252,7 +252,7 @@
};
};
weim: weim@00220000 {
weim: weim@220000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,imx1-weim";
@ -269,7 +269,7 @@
status = "disabled";
};
esram: esram@00300000 {
esram: esram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x20000>;
};

2
arch/arm/boot/dts/imx25-pdk.dts
View File

@ -135,7 +135,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
codec: sgtl5000@0a {
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 129>;

2
arch/arm/boot/dts/imx28-apx4devkit.dts
View File

@ -142,7 +142,7 @@
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p3v>;

2
arch/arm/boot/dts/imx28-eukrea-mbmx28lc.dtsi
View File

@ -148,7 +148,7 @@
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p3v>;

2
arch/arm/boot/dts/imx28-evk.dts
View File

@ -194,7 +194,7 @@
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p3v>;

2
arch/arm/boot/dts/imx28-m28evk.dts
View File

@ -137,7 +137,7 @@
};
i2c0: i2c@80058000 {
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p3v>;

2
arch/arm/boot/dts/imx28-tx28.dts
View File

@ -298,7 +298,7 @@
clock-frequency = <400000>;
status = "okay";
sgtl5000: sgtl5000@0a {
sgtl5000: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_2p5v>;

2
arch/arm/boot/dts/imx50.dtsi
View File

@ -52,7 +52,7 @@
};
};
tzic: tz-interrupt-controller@0fffc000 {
tzic: tz-interrupt-controller@fffc000 {
compatible = "fsl,imx50-tzic", "fsl,imx53-tzic", "fsl,tzic";
interrupt-controller;
#interrupt-cells = <1>;

2
arch/arm/boot/dts/imx51-babbage.dts
View File

@ -337,7 +337,7 @@
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clkcodec>;

2
arch/arm/boot/dts/imx53-m53evk.dts
View File

@ -150,7 +150,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p2v>;

2
arch/arm/boot/dts/imx53-qsb-common.dtsi
View File

@ -314,7 +314,7 @@
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p2v>;

4
arch/arm/boot/dts/imx53-smd.dts
View File

@ -232,12 +232,12 @@
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
codec: sgtl5000@0a {
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
magnetometer: mag3110@0e {
magnetometer: mag3110@e {
compatible = "fsl,mag3110";
reg = <0x0e>;
};

2
arch/arm/boot/dts/imx53-tx53-x03x.dts
View File

@ -203,7 +203,7 @@
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_2v5>;

6
arch/arm/boot/dts/imx53-tx53-x13x.dts
View File

@ -93,7 +93,7 @@
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
touchscreen2: eeti@04 {
touchscreen2: eeti@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
pinctrl-names = "default";
@ -110,7 +110,7 @@
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_2v5>;
@ -118,7 +118,7 @@
clocks = <&mclk>;
};
touchscreen1: eeti@04 {
touchscreen1: eeti@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
pinctrl-names = "default";

2
arch/arm/boot/dts/imx53-voipac-bsb.dts
View File

@ -130,7 +130,7 @@
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p3v>;

2
arch/arm/boot/dts/imx53.dtsi
View File

@ -80,7 +80,7 @@
ports = <&ipu_di0>, <&ipu_di1>;
};
tzic: tz-interrupt-controller@0fffc000 {
tzic: tz-interrupt-controller@fffc000 {
compatible = "fsl,imx53-tzic", "fsl,tzic";
interrupt-controller;
#interrupt-cells = <1>;

4
arch/arm/boot/dts/imx6dl-riotboard.dts
View File

@ -157,7 +157,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
codec: sgtl5000@0a {
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
@ -165,7 +165,7 @@
VDDIO-supply = <&reg_3p3v>;
};
pmic: pf0100@08 {
pmic: pf0100@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
interrupt-parent = <&gpio5>;

2
arch/arm/boot/dts/imx6dl-tx6u-811x.dts
View File

@ -99,7 +99,7 @@
};
&i2c3 {
polytouch2: eeti@04 {
polytouch2: eeti@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
pinctrl-names = "default";

2
arch/arm/boot/dts/imx6dl-tx6u-81xx-mb7.dts
View File

@ -107,7 +107,7 @@
};
&i2c3 {
polytouch1: eeti@04 {
polytouch1: eeti@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
pinctrl-names = "default";

16
arch/arm/boot/dts/imx6dl.dtsi
View File

@ -60,35 +60,35 @@
};
soc {
ocram: sram@00900000 {
ocram: sram@900000 {
compatible = "mmio-sram";
reg = <0x00900000 0x20000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
aips1: aips-bus@02000000 {
iomuxc: iomuxc@020e0000 {
aips1: aips-bus@2000000 {
iomuxc: iomuxc@20e0000 {
compatible = "fsl,imx6dl-iomuxc";
};
pxp: pxp@020f0000 {
pxp: pxp@20f0000 {
reg = <0x020f0000 0x4000>;
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
};
epdc: epdc@020f4000 {
epdc: epdc@20f4000 {
reg = <0x020f4000 0x4000>;
interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
};
lcdif: lcdif@020f8000 {
lcdif: lcdif@20f8000 {
reg = <0x020f8000 0x4000>;
interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
};
};
aips2: aips-bus@02100000 {
i2c4: i2c@021f8000 {
aips2: aips-bus@2100000 {
i2c4: i2c@21f8000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";

2
arch/arm/boot/dts/imx6q-bx50v3.dtsi
View File

@ -165,7 +165,7 @@
#size-cells = <0>;
reg = <0x3>;
sgtl5000: codec@0a {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&mclk>;

2
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
View File

@ -139,7 +139,7 @@
&pinctrl_pfuze>;
status = "okay";
pmic: pfuze100@08 {
pmic: pfuze100@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
interrupt-parent = <&gpio3>;

6
arch/arm/boot/dts/imx6q-gw5400-a.dts
View File

@ -211,7 +211,7 @@
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pmic: pfuze100@08 {
pmic: pfuze100@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
@ -322,7 +322,7 @@
reg = <0x1c>;
};
codec: sgtl5000@0a {
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
@ -330,7 +330,7 @@
VDDIO-supply = <&reg_3p3v>;
};
touchscreen: egalax_ts@04 {
touchscreen: egalax_ts@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio7>;

4
arch/arm/boot/dts/imx6q-h100.dts
View File

@ -185,7 +185,7 @@
reg = <0x68>;
};
sgtl5000: sgtl5000@0a {
sgtl5000: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
pinctrl-names = "default";
@ -195,7 +195,7 @@
VDDIO-supply = <&reg_3p3v>;
};
tc358743: tc358743@0f {
tc358743: tc358743@f {
compatible = "toshiba,tc358743";
reg = <0x0f>;
pinctrl-names = "default";

2
arch/arm/boot/dts/imx6q-icore-rqs.dts
View File

@ -63,7 +63,7 @@
};
&i2c3 {
codec: sgtl5000@0a {
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;

2
arch/arm/boot/dts/imx6q-mccmon6.dts
View File

@ -121,7 +121,7 @@
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pfuze100: pmic@08 {
pfuze100: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

4
arch/arm/boot/dts/imx6q-novena.dts
View File

@ -255,7 +255,7 @@
reg = <0x68>;
};
sbs_battery: bq20z75@0b {
sbs_battery: bq20z75@b {
compatible = "sbs,sbs-battery";
reg = <0x0b>;
sbs,i2c-retry-count = <50>;
@ -295,7 +295,7 @@
pinctrl-0 = <&pinctrl_i2c2_novena>;
status = "okay";
pmic: pfuze100@08 {
pmic: pfuze100@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

Some files were not shown because too many files have changed in this diff Show More