iommu/amd: Introduce amd_iommu_update_ga()
Introduces a new IOMMU API, amd_iommu_update_ga(), which allows KVM (SVM) to update existing posted interrupt IOMMU IRTE when load/unload vcpu. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -4269,4 +4269,43 @@ int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
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return 0;
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}
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int amd_iommu_update_ga(int cpu, bool is_run, void *data)
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{
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unsigned long flags;
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struct amd_iommu *iommu;
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struct irq_remap_table *irt;
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struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
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int devid = ir_data->irq_2_irte.devid;
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struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
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struct irte_ga *ref = (struct irte_ga *) ir_data->ref;
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if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) ||
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!ref || !entry || !entry->lo.fields_vapic.guest_mode)
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return 0;
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iommu = amd_iommu_rlookup_table[devid];
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if (!iommu)
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return -ENODEV;
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irt = get_irq_table(devid, false);
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if (!irt)
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return -ENODEV;
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spin_lock_irqsave(&irt->lock, flags);
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if (ref->lo.fields_vapic.guest_mode) {
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if (cpu >= 0)
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ref->lo.fields_vapic.destination = cpu;
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ref->lo.fields_vapic.is_run = is_run;
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barrier();
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}
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spin_unlock_irqrestore(&irt->lock, flags);
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iommu_flush_irt(iommu, devid);
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iommu_completion_wait(iommu);
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return 0;
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}
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EXPORT_SYMBOL(amd_iommu_update_ga);
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#endif
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@ -810,6 +810,7 @@ struct amd_ir_data {
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struct irq_2_irte irq_2_irte;
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struct msi_msg msi_entry;
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void *entry; /* Pointer to union irte or struct irte_ga */
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void *ref; /* Pointer to the actual irte */
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};
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struct amd_irte_ops {
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@ -179,6 +179,9 @@ static inline int amd_iommu_detect(void) { return -ENODEV; }
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/* IOMMU AVIC Function */
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extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
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extern int
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amd_iommu_update_ga(int cpu, bool is_run, void *data);
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#else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
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static inline int
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@ -187,6 +190,12 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
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return 0;
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}
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static inline int
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amd_iommu_update_ga(int cpu, bool is_run, void *data)
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{
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return 0;
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}
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#endif /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
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#endif /* _ASM_X86_AMD_IOMMU_H */
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