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drm/amdgpu: enable DF clock gating for rn 

Enable DF clock gating during DF IP early init.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Prike Liang 2019-08-02 15:32:57 +08:00 committed by Alex Deucher
parent e2ef3b70e8
commit 8db63b7c38
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/amd/amdgpu/soc15.c
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@ -1172,7 +1172,8 @@ static int soc15_common_early_init(void *handle)
AMD_CG_SUPPORT_VCN_MGCG |
AMD_CG_SUPPORT_IH_CG |
AMD_CG_SUPPORT_ATHUB_LS |
AMD_CG_SUPPORT_ATHUB_MGCG;
AMD_CG_SUPPORT_ATHUB_MGCG |
AMD_CG_SUPPORT_DF_MGCG;
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x91;