Late pin control fixes for v5.12:
- Fix the number of pins in the community of the Intel Lewisburg SoC. - Show pin numbers for controllers with base = 0 in the new debugfs feature. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmCDVSEACgkQQRCzN7AZ XXMZFA//TOed1OfNe3FOxNMZ9bTemv/SQJYLrfcfT+m0VzDp27N07aywCW47axVF 63udoLzJvPFhp8hTJabr2bsxHZ4A51k49YDJLbIEh1ZTuuLuzaWl2rSuNKCY/ogT Kvqjb8/c73TC7sbV24z1dBefHP34wFHB2BEJHogwiS7Z2Jdyb0i5G5G/dcjRtzkB y8JGLfYsSOygccOzSqlkAbAPni7ktzbf0AiDcaGdP5lgBWeiEjROZpncLmsMV5Dn vgzdT3PYNctjEDz/pUlwHr+VUER2ybDzz9s87TbB0p6gyWUqsV1Uaq38YxvP/qx8 n50JOERhG/216yFvXZCWmA1Znx/tPew9ys7hdDFGcyzUfr1yyQRkgSTLg5NV//TB aTBb/qaXC8NtNXhiQZtLLKxFnizvMDtFj6e5ljfAA9Pj7yxfxfFb+1bwQn045nsN q4OZ9TegYAIarBAFZn4jcrxSrA5ep3qaYi1p4JhdayPzF5w+SMeWMX5wlpTLaERB sts8uBuPa2/LOPXRsdfERPFA5YZKTTcfy70DMP2z0O+UwLCntp7119e3FfefhyaQ 97aocxhR+tKa46Nk0HbU1G9cTNkL2FFnnIP3cRvkY409KGppcxGKIeJLwNSTYwKo fsxbPywM1VegAQQWjl7TNIQYmIqL5CdTbF6gvsYq0q4h9rw8scM= =zhfn -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Late pin control fixes, would have been in the main pull request normally but hey I got lucky and we got another week to polish up v5.12 so here we go. One driver fix and one making the core debugfs work: - Fix the number of pins in the community of the Intel Lewisburg SoC - Show pin numbers for controllers with base = 0 in the new debugfs feature" * tag 'pinctrl-v5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: core: Show pin numbers for the controllers with base = 0 pinctrl: lewisburg: Update number of pins in community
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8db5efb83f
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@ -1604,8 +1604,8 @@ static int pinctrl_pins_show(struct seq_file *s, void *what)
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unsigned i, pin;
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#ifdef CONFIG_GPIOLIB
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struct pinctrl_gpio_range *range;
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unsigned int gpio_num;
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struct gpio_chip *chip;
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int gpio_num;
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#endif
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seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
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@ -1625,7 +1625,7 @@ static int pinctrl_pins_show(struct seq_file *s, void *what)
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seq_printf(s, "pin %d (%s) ", pin, desc->name);
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#ifdef CONFIG_GPIOLIB
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gpio_num = 0;
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gpio_num = -1;
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list_for_each_entry(range, &pctldev->gpio_ranges, node) {
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if ((pin >= range->pin_base) &&
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(pin < (range->pin_base + range->npins))) {
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@ -1633,10 +1633,12 @@ static int pinctrl_pins_show(struct seq_file *s, void *what)
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break;
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}
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}
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chip = gpio_to_chip(gpio_num);
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if (chip && chip->gpiodev && chip->gpiodev->base)
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seq_printf(s, "%u:%s ", gpio_num -
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chip->gpiodev->base, chip->label);
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if (gpio_num >= 0)
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chip = gpio_to_chip(gpio_num);
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else
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chip = NULL;
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if (chip)
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seq_printf(s, "%u:%s ", gpio_num - chip->gpiodev->base, chip->label);
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else
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seq_puts(s, "0:? ");
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#endif
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@ -299,9 +299,9 @@ static const struct pinctrl_pin_desc lbg_pins[] = {
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static const struct intel_community lbg_communities[] = {
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LBG_COMMUNITY(0, 0, 71),
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LBG_COMMUNITY(1, 72, 132),
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LBG_COMMUNITY(3, 133, 144),
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LBG_COMMUNITY(4, 145, 180),
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LBG_COMMUNITY(5, 181, 246),
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LBG_COMMUNITY(3, 133, 143),
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LBG_COMMUNITY(4, 144, 178),
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LBG_COMMUNITY(5, 179, 246),
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};
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static const struct intel_pinctrl_soc_data lbg_soc_data = {
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