mvebu dt64 for 4.16 (part 1)
Add the NAND support on the Marvell 8040-DB board Add the thermal support for Martvell A7K/A8K Socs Add nodes allowing cpufreq support on Aramda 3700 SoCs -----BEGIN PGP SIGNATURE----- iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWjzjGiMcZ3JlZ29yeS5j bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71eRxAKCkcg3nYB1F MLYZ5pQg0SA8p8IOPwCfczw9Uui9xxSaMnEjBgcDOZnkoSo= =9aGc -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-4.16-1' of git://git.infradead.org/linux-mvebu into next/dt mvebu dt64 for 4.16 (part 1) Add the NAND support on the Marvell 8040-DB board Add the thermal support for Martvell A7K/A8K Socs Add nodes allowing cpufreq support on Aramda 3700 SoCs * tag 'mvebu-dt64-4.16-1' of git://git.infradead.org/linux-mvebu: ARM64: dts: marvell: Add thermal support for A7K/A8K arm64: dts: marvell: armada-37xx: add nodes allowing cpufreq support arm64: dts: marvell: add NAND support on the 8040-DB board Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
8db4e1faac
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@ -56,6 +56,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a53","arm,armv8";
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reg = <0x1>;
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clocks = <&nb_periph_clk 16>;
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enable-method = "psci";
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};
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};
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@ -65,6 +65,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a53", "arm,armv8";
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reg = <0>;
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clocks = <&nb_periph_clk 16>;
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enable-method = "psci";
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};
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};
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@ -234,6 +235,12 @@
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};
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};
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nb_pm: syscon@14000 {
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compatible = "marvell,armada-3700-nb-pm",
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"syscon";
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reg = <0x14000 0x60>;
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};
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pinctrl_sb: pinctrl@18800 {
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compatible = "marvell,armada3710-sb-pinctrl",
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"syscon", "simple-mfd";
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@ -268,6 +268,34 @@
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};
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};
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/*
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* Proper NAND usage will require DPR-76 to be in position 1-2, which disables
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* MDIO signal of CP1.
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*/
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&cps_nand {
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num-cs = <1>;
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pinctrl-0 = <&nand_pins>, <&nand_rb>;
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pinctrl-names = "default";
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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marvell,nand-enable-arbiter;
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marvell,system-controller = <&cps_syscon0>;
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nand-on-flash-bbt;
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partition@0 {
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label = "U-Boot";
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reg = <0 0x200000>;
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};
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partition@200000 {
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label = "Linux";
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reg = <0x200000 0xe00000>;
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};
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partition@1000000 {
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label = "Filesystem";
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reg = <0x1000000 0x3f000000>;
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};
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};
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/* CON4 on CP1 expansion */
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&cps_sata0 {
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status = "okay";
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@ -72,5 +72,22 @@
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&cps_syscon0 {
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cps_pinctrl: pinctrl {
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compatible = "marvell,armada-8k-cps-pinctrl";
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nand_pins: nand-pins {
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marvell,pins =
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"mpp0", "mpp1", "mpp2", "mpp3",
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"mpp4", "mpp5", "mpp6", "mpp7",
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"mpp8", "mpp9", "mpp10", "mpp11",
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"mpp15", "mpp16", "mpp17", "mpp18",
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"mpp19", "mpp20", "mpp21", "mpp22",
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"mpp23", "mpp24", "mpp25", "mpp26",
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"mpp27";
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marvell,function = "dev";
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};
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nand_rb: nand-rb {
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marvell,pins = "mpp13", "mpp12";
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marvell,function = "nf";
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};
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};
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};
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@ -285,6 +285,12 @@
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gpio-ranges = <&ap_pinctrl 0 0 20>;
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};
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};
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ap_thermal: thermal@6f808C {
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compatible = "marvell,armada-ap806-thermal";
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reg = <0x6f808C 0x4>,
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<0x6f8084 0x8>;
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};
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};
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};
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};
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@ -182,6 +182,12 @@
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interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
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};
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cpm_thermal: thermal@400078 {
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compatible = "marvell,armada-cp110-thermal";
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reg = <0x400078 0x4>,
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<0x400070 0x8>;
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};
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cpm_syscon0: system-controller@440000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x440000 0x2000>;
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@ -182,6 +182,12 @@
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interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
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};
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cps_thermal: thermal@400078 {
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compatible = "marvell,armada-cp110-thermal";
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reg = <0x400078 0x4>,
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<0x400070 0x8>;
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};
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cps_syscon0: system-controller@440000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x440000 0x2000>;
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@ -317,12 +323,13 @@
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* for A7K and on the CPS for A8K.
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*/
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compatible = "marvell,armada370-nand",
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"marvell,armada370-nand";
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"marvell,armada-8k-nand";
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reg = <0x720000 0x54>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cps_clk 1 2>;
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marvell,system-controller = <&cpm_syscon0>;
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status = "disabled";
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};
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