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Merge branch 'efm32/cleanup' into next/dt 

Dependency for efm32/dt branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2014-03-17 10:14:10 +01:00
parent c5d326c22b d5d5ce952a
commit 8d445234dc
77 changed files with 153 additions and 742 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/serial/atmel-usart.txt
View File

@ -13,6 +13,8 @@ Required properties:
Optional properties:
- atmel,use-dma-rx: use of PDC or DMA for receiving data
- atmel,use-dma-tx: use of PDC or DMA for transmitting data
- rts-gpios: specify a GPIO for RTS line. It will use specified PIO instead of the peripheral
function pin for the USART RTS feature. If unsure, don't specify this property.
- add dma bindings for dma transfer:
- dmas: DMA specifier, consisting of a phandle to DMA controller node,
memory peripheral interface and USART DMA channel ID, FIFO configuration.
@ -33,6 +35,7 @@ Example:
clock-names = "usart";
atmel,use-dma-rx;
atmel,use-dma-tx;
rts-gpios = <&pioD 15 0>;
};
- use DMA:

3
arch/arm/Kconfig
View File

@ -421,9 +421,6 @@ config ARCH_EFM32
depends on !MMU
select ARCH_REQUIRE_GPIOLIB
select ARM_NVIC
# CLKSRC_MMIO is wrong here, but needed until a proper fix is merged,
# i.e. CLKSRC_EFM32 selecting CLKSRC_MMIO
select CLKSRC_MMIO
select CLKSRC_OF
select COMMON_CLK
select CPU_V7M

6
arch/arm/include/asm/timex.h
View File

@ -12,12 +12,6 @@
#ifndef _ASMARM_TIMEX_H
#define _ASMARM_TIMEX_H
#ifdef CONFIG_ARCH_MULTIPLATFORM
#define CLOCK_TICK_RATE 1000000
#else
#include <mach/timex.h>
#endif
typedef unsigned long cycles_t;
#define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; })

1
arch/arm/mach-at91/at91rm9200.c
View File

@ -21,6 +21,7 @@
#include <mach/at91rm9200.h>
#include <mach/at91_st.h>
#include <mach/cpu.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "soc.h"

11
arch/arm/mach-at91/at91rm9200_devices.c
View File

@ -21,6 +21,7 @@
#include <mach/at91rm9200.h>
#include <mach/at91rm9200_mc.h>
#include <mach/at91_ramc.h>
#include <mach/hardware.h>
#include "board.h"
#include "generic.h"
@ -922,6 +923,7 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.rts_gpio = -EINVAL,
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@ -960,6 +962,7 @@ static struct resource uart0_resources[] = {
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart0_dmamask = DMA_BIT_MASK(32);
@ -987,9 +990,10 @@ static inline void configure_usart0_pins(unsigned pins)
if (pins & ATMEL_UART_RTS) {
/*
* AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
* We need to drive the pin manually. Default is off (RTS is active low).
* We need to drive the pin manually. The serial driver will driver
* this to high when initializing.
*/
at91_set_gpio_output(AT91_PIN_PA21, 1);
uart0_data.rts_gpio = AT91_PIN_PA21;
}
}
@ -1009,6 +1013,7 @@ static struct resource uart1_resources[] = {
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart1_dmamask = DMA_BIT_MASK(32);
@ -1060,6 +1065,7 @@ static struct resource uart2_resources[] = {
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart2_dmamask = DMA_BIT_MASK(32);
@ -1103,6 +1109,7 @@ static struct resource uart3_resources[] = {
static struct atmel_uart_data uart3_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart3_dmamask = DMA_BIT_MASK(32);

1
arch/arm/mach-at91/at91rm9200_time.c
View File

@ -31,6 +31,7 @@
#include <asm/mach/time.h>
#include <mach/at91_st.h>
#include <mach/hardware.h>
static unsigned long last_crtr;
static u32 irqmask;

1
arch/arm/mach-at91/at91sam9260.c
View File

@ -21,6 +21,7 @@
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
#include <mach/at91sam9260.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "at91_rstc.h"

8
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -25,6 +25,7 @@
#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/at91_adc.h>
#include <mach/hardware.h>
#include "board.h"
#include "generic.h"
@ -819,6 +820,7 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.rts_gpio = -EINVAL,
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@ -857,6 +859,7 @@ static struct resource uart0_resources[] = {
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart0_dmamask = DMA_BIT_MASK(32);
@ -908,6 +911,7 @@ static struct resource uart1_resources[] = {
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart1_dmamask = DMA_BIT_MASK(32);
@ -951,6 +955,7 @@ static struct resource uart2_resources[] = {
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart2_dmamask = DMA_BIT_MASK(32);
@ -994,6 +999,7 @@ static struct resource uart3_resources[] = {
static struct atmel_uart_data uart3_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart3_dmamask = DMA_BIT_MASK(32);
@ -1037,6 +1043,7 @@ static struct resource uart4_resources[] = {
static struct atmel_uart_data uart4_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart4_dmamask = DMA_BIT_MASK(32);
@ -1075,6 +1082,7 @@ static struct resource uart5_resources[] = {
static struct atmel_uart_data uart5_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart5_dmamask = DMA_BIT_MASK(32);

1
arch/arm/mach-at91/at91sam9261.c
View File

@ -20,6 +20,7 @@
#include <asm/system_misc.h>
#include <mach/cpu.h>
#include <mach/at91sam9261.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "at91_rstc.h"

5
arch/arm/mach-at91/at91sam9261_devices.c
View File

@ -25,6 +25,7 @@
#include <mach/at91sam9261_matrix.h>
#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/hardware.h>
#include "board.h"
#include "generic.h"
@ -880,6 +881,7 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.rts_gpio = -EINVAL,
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@ -918,6 +920,7 @@ static struct resource uart0_resources[] = {
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart0_dmamask = DMA_BIT_MASK(32);
@ -961,6 +964,7 @@ static struct resource uart1_resources[] = {
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart1_dmamask = DMA_BIT_MASK(32);
@ -1004,6 +1008,7 @@ static struct resource uart2_resources[] = {
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart2_dmamask = DMA_BIT_MASK(32);

1
arch/arm/mach-at91/at91sam9263.c
View File

@ -19,6 +19,7 @@
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/at91sam9263.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "at91_rstc.h"

5
arch/arm/mach-at91/at91sam9263_devices.c
View File

@ -24,6 +24,7 @@
#include <mach/at91sam9263_matrix.h>
#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/hardware.h>
#include "board.h"
#include "generic.h"
@ -1324,6 +1325,7 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.rts_gpio = -EINVAL,
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@ -1362,6 +1364,7 @@ static struct resource uart0_resources[] = {
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart0_dmamask = DMA_BIT_MASK(32);
@ -1405,6 +1408,7 @@ static struct resource uart1_resources[] = {
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart1_dmamask = DMA_BIT_MASK(32);
@ -1448,6 +1452,7 @@ static struct resource uart2_resources[] = {
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart2_dmamask = DMA_BIT_MASK(32);

1
arch/arm/mach-at91/at91sam926x_time.c
View File

@ -19,6 +19,7 @@
#include <linux/of_irq.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
#define AT91_PIT_MR 0x00 /* Mode Register */
#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */

1
arch/arm/mach-at91/at91sam9g45.c
View File

@ -20,6 +20,7 @@
#include <asm/system_misc.h>
#include <mach/at91sam9g45.h>
#include <mach/cpu.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "soc.h"

6
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -32,6 +32,7 @@
#include <mach/at91sam9_smc.h>
#include <linux/platform_data/dma-atmel.h>
#include <mach/atmel-mci.h>
#include <mach/hardware.h>
#include <media/atmel-isi.h>
@ -1587,6 +1588,7 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0,
.rts_gpio = -EINVAL,
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@ -1625,6 +1627,7 @@ static struct resource uart0_resources[] = {
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart0_dmamask = DMA_BIT_MASK(32);
@ -1668,6 +1671,7 @@ static struct resource uart1_resources[] = {
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart1_dmamask = DMA_BIT_MASK(32);
@ -1711,6 +1715,7 @@ static struct resource uart2_resources[] = {
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart2_dmamask = DMA_BIT_MASK(32);
@ -1754,6 +1759,7 @@ static struct resource uart3_resources[] = {
static struct atmel_uart_data uart3_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart3_dmamask = DMA_BIT_MASK(32);

1
arch/arm/mach-at91/at91sam9rl.c
View File

@ -20,6 +20,7 @@
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
#include <mach/at91sam9rl.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "at91_rstc.h"

6
arch/arm/mach-at91/at91sam9rl_devices.c
View File

@ -21,6 +21,7 @@
#include <mach/at91sam9rl_matrix.h>
#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/hardware.h>
#include <linux/platform_data/dma-atmel.h>
#include "board.h"
@ -956,6 +957,7 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.rts_gpio = -EINVAL,
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@ -994,6 +996,7 @@ static struct resource uart0_resources[] = {
static struct atmel_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart0_dmamask = DMA_BIT_MASK(32);
@ -1045,6 +1048,7 @@ static struct resource uart1_resources[] = {
static struct atmel_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart1_dmamask = DMA_BIT_MASK(32);
@ -1088,6 +1092,7 @@ static struct resource uart2_resources[] = {
static struct atmel_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart2_dmamask = DMA_BIT_MASK(32);
@ -1131,6 +1136,7 @@ static struct resource uart3_resources[] = {
static struct atmel_uart_data uart3_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
.rts_gpio = -EINVAL,
};
static u64 uart3_dmamask = DMA_BIT_MASK(32);

2
arch/arm/mach-at91/at91x40.c
View File

@ -19,7 +19,7 @@
#include <asm/mach/arch.h>
#include <mach/at91x40.h>
#include <mach/at91_st.h>
#include <mach/timex.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "generic.h"

1
arch/arm/mach-at91/at91x40_time.c
View File

@ -25,6 +25,7 @@
#include <linux/time.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/at91x40.h>
#include <asm/mach/time.h>
#include "at91_tc.h"

1
arch/arm/mach-at91/board-gsia18s.c
View File

@ -31,6 +31,7 @@
#include <asm/mach/arch.h>
#include <mach/at91sam9_smc.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "board.h"

1
arch/arm/mach-at91/board-pcontrol-g20.c
View File

@ -30,6 +30,7 @@
#include <asm/mach/arch.h>
#include <mach/at91sam9_smc.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "board.h"

1
arch/arm/mach-at91/board-stamp9g20.c
View File

@ -26,6 +26,7 @@
#include <asm/mach/arch.h>
#include <mach/at91sam9_smc.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "board.h"

2
arch/arm/mach-at91/include/mach/at91x40.h
View File

@ -55,4 +55,6 @@
#define AT91_PS_CR (AT91_PS + 0) /* PS Control register */
#define AT91_PS_CR_CPU (1 << 0) /* CPU clock disable bit */
#define AT91X40_MASTER_CLOCK 40000000
#endif /* AT91X40_H */

37
arch/arm/mach-at91/include/mach/timex.h
View File

@ -1,37 +0,0 @@
/*
* arch/arm/mach-at91/include/mach/timex.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
#include <mach/hardware.h>
#ifdef CONFIG_ARCH_AT91X40
#define AT91X40_MASTER_CLOCK 40000000
#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK)
#else
#define CLOCK_TICK_RATE 12345678
#endif
#endif /* __ASM_ARCH_TIMEX_H */

1
arch/arm/mach-at91/pm.c
View File

@ -27,6 +27,7 @@
#include <asm/mach/irq.h>
#include <mach/cpu.h>
#include <mach/hardware.h>
#include "at91_aic.h"
#include "generic.h"

2
arch/arm/mach-clps711x/include/mach/timex.h
View File

@ -1,2 +0,0 @@
/* Bogus value */
#define CLOCK_TICK_RATE 512000

22
arch/arm/mach-davinci/include/mach/timex.h
View File

@ -1,22 +0,0 @@
/*
* DaVinci timer defines
*
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
/*
* Alert: Not all timers of the DaVinci family run at a frequency of 27MHz,
* but we should be fine as long as CLOCK_TICK_RATE or LATCH (see include/
* linux/jiffies.h) are not used directly in code. Currently none of the
* code relevant to DaVinci platform depends on these values directly.
*/
#define CLOCK_TICK_RATE 27000000
#endif /* __ASM_ARCH_TIMEX_H__ */

9
arch/arm/mach-dove/include/mach/timex.h
View File

@ -1,9 +0,0 @@
/*
* arch/arm/mach-dove/include/mach/timex.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define CLOCK_TICK_RATE (100 * HZ)

19
arch/arm/mach-ebsa110/include/mach/timex.h
View File

@ -1,19 +0,0 @@
/*
* arch/arm/mach-ebsa110/include/mach/timex.h
*
* Copyright (C) 1997, 1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* EBSA110 architecture timex specifications
*/
/*
* On the EBSA, the clock ticks at weird rates.
* This is therefore not used to calculate the
* divisor.
*/
#define CLOCK_TICK_RATE 47894000

4
arch/arm/mach-efm32/include/mach/entry-macro.S
View File

@ -1,4 +0,0 @@
/*
* Empty file waiting for deletion once <mach/entry-macro.S> isn't needed any
* more. Patch "ARM: v7-M: drop using mach/entry-macro.S" sitting in next.
*/

3
arch/arm/mach-efm32/include/mach/timex.h
View File

@ -1,3 +0,0 @@
/*
* Empty file waiting for deletion once <mach/timex.h> isn't needed any more.
*/

2
arch/arm/mach-ep93xx/core.c
View File

@ -117,7 +117,7 @@ void __init ep93xx_map_io(void)
#define EP93XX_TIMER4_CLOCK 983040
#define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(EP93XX_TIMER4_CLOCK, HZ)
static unsigned int last_jiffy_time;

5
arch/arm/mach-ep93xx/include/mach/timex.h
View File

@ -1,5 +0,0 @@
/*
* arch/arm/mach-ep93xx/include/mach/timex.h
*/
#define CLOCK_TICK_RATE 983040

29
arch/arm/mach-exynos/include/mach/timex.h
View File

@ -1,29 +0,0 @@
/* linux/arch/arm/mach-exynos4/include/mach/timex.h
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Copyright (c) 2003-2010 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Based on arch/arm/mach-s5p6442/include/mach/timex.h
*
* EXYNOS4 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H __FILE__
/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
* a variable is useless. It seems as long as we make our timers an
* exact multiple of HZ, any value that makes a 1->1 correspondence
* for the time conversion functions to/from jiffies is acceptable.
*/
#define CLOCK_TICK_RATE 12000000
#endif /* __ASM_ARCH_TIMEX_H */

18
arch/arm/mach-footbridge/include/mach/timex.h
View File

@ -1,18 +0,0 @@
/*
* arch/arm/mach-footbridge/include/mach/timex.h
*
* Copyright (C) 1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* EBSA285 architecture timex specifications
*/
/*
* We assume a constant here; this satisfies the maths in linux/timex.h
* and linux/time.h. CLOCK_TICK_RATE is actually system dependent, but
* this must be a constant.
*/
#define CLOCK_TICK_RATE (50000000/16)

13
arch/arm/mach-gemini/include/mach/timex.h
View File

@ -1,13 +0,0 @@
/*
* Gemini timex specifications
*
* Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
/* When AHB bus frequency is 150MHz */
#define CLOCK_TICK_RATE 38000000

26
arch/arm/mach-integrator/include/mach/timex.h
View File

@ -1,26 +0,0 @@
/*
* arch/arm/mach-integrator/include/mach/timex.h
*
* Integrator architecture timex specifications
*
* Copyright (C) 1999 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* ??
*/
#define CLOCK_TICK_RATE (50000000 / 16)

1
arch/arm/mach-iop13xx/include/mach/timex.h
View File

@ -1 +0,0 @@
#define CLOCK_TICK_RATE (100 * HZ)

6
arch/arm/mach-iop32x/include/mach/timex.h
View File

@ -1,6 +0,0 @@
/*
* arch/arm/mach-iop32x/include/mach/timex.h
*
* IOP32x architecture timex specifications
*/
#define CLOCK_TICK_RATE (100 * HZ)

6
arch/arm/mach-iop33x/include/mach/timex.h
View File

@ -1,6 +0,0 @@
/*
* arch/arm/mach-iop33x/include/mach/timex.h
*
* IOP3xx architecture timex specifications
*/
#define CLOCK_TICK_RATE (100 * HZ)

14
arch/arm/mach-ixp4xx/common.c
View File

@ -23,7 +23,6 @@
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/io.h>
@ -45,6 +44,17 @@
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#define IXP4XX_TIMER_FREQ 66666000
/*
* The timer register doesn't allow to specify the two least significant bits of
* the timeout value and assumes them being zero. So make sure IXP4XX_LATCH is
* the best value with the two least significant bits unset.
*/
#define IXP4XX_LATCH DIV_ROUND_CLOSEST(IXP4XX_TIMER_FREQ, \
(IXP4XX_OST_RELOAD_MASK + 1) * HZ) * \
(IXP4XX_OST_RELOAD_MASK + 1)
static void __init ixp4xx_clocksource_init(void);
static void __init ixp4xx_clockevent_init(void);
static struct clock_event_device clockevent_ixp4xx;
@ -520,7 +530,7 @@ static void ixp4xx_set_mode(enum clock_event_mode mode,
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
osrt = LATCH & ~IXP4XX_OST_RELOAD_MASK;
osrt = IXP4XX_LATCH & ~IXP4XX_OST_RELOAD_MASK;
opts = IXP4XX_OST_ENABLE;
break;
case CLOCK_EVT_MODE_ONESHOT:

16
arch/arm/mach-ixp4xx/include/mach/timex.h
View File

@ -1,16 +0,0 @@
/*
* arch/arm/mach-ixp4xx/include/mach/timex.h
*
*/
#include <mach/ixp4xx-regs.h>
/*
* We use IXP425 General purpose timer for our timer needs, it runs at
* 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the
* timer register ignores the bottom 2 bits of the LATCH value.
*/
#define IXP4XX_TIMER_FREQ 66666000
#define CLOCK_TICK_RATE \
(((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)

10
arch/arm/mach-kirkwood/include/mach/timex.h
View File

@ -1,10 +0,0 @@
/*
* arch/arm/mach-kirkwood/include/mach/timex.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define CLOCK_TICK_RATE (100 * HZ)

21
arch/arm/mach-ks8695/include/mach/timex.h
View File

@ -1,21 +0,0 @@
/*
* arch/arm/mach-ks8695/include/mach/timex.h
*
* Copyright (C) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* KS8695 - Time Parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
#include <mach/hardware.h>
#define CLOCK_TICK_RATE KS8695_CLOCK_RATE
#endif

28
arch/arm/mach-lpc32xx/include/mach/timex.h
View File

@ -1,28 +0,0 @@
/*
* arch/arm/mach-lpc32xx/include/mach/timex.h
*
* Author: Kevin Wells <kevin.wells@nxp.com>
*
* Copyright (C) 2010 NXP Semiconductors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
/*
* Rate in Hz of the main system oscillator. This value should match
* the value 'MAIN_OSC_FREQ' in platform.h
*/
#define CLOCK_TICK_RATE 13000000
#endif

13
arch/arm/mach-mmp/include/mach/timex.h
View File

@ -1,13 +0,0 @@
/*
* linux/arch/arm/mach-mmp/include/mach/timex.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifdef CONFIG_CPU_MMP2
#define CLOCK_TICK_RATE 6500000
#else
#define CLOCK_TICK_RATE 3250000
#endif

12
arch/arm/mach-mmp/time.c
View File

@ -39,6 +39,12 @@
#include "clock.h"
#ifdef CONFIG_CPU_MMP2
#define MMP_CLOCK_FREQ 6500000
#else
#define MMP_CLOCK_FREQ 3250000
#endif
#define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE
#define MAX_DELTA (0xfffffffe)
@ -195,14 +201,14 @@ void __init timer_init(int irq)
{
timer_config();
sched_clock_register(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
sched_clock_register(mmp_read_sched_clock, 32, MMP_CLOCK_FREQ);
ckevt.cpumask = cpumask_of(0);
setup_irq(irq, &timer_irq);
clocksource_register_hz(&cksrc, CLOCK_TICK_RATE);
clockevents_config_and_register(&ckevt, CLOCK_TICK_RATE,
clocksource_register_hz(&cksrc, MMP_CLOCK_FREQ);
clockevents_config_and_register(&ckevt, MMP_CLOCK_FREQ,
MIN_DELTA, MAX_DELTA);
}

21
arch/arm/mach-msm/include/mach/timex.h
View File

@ -1,21 +0,0 @@
/* arch/arm/mach-msm/include/mach/timex.h
*
* Copyright (C) 2007 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ASM_ARCH_MSM_TIMEX_H
#define __ASM_ARCH_MSM_TIMEX_H
#define CLOCK_TICK_RATE 1000000
#endif

9
arch/arm/mach-mv78xx0/include/mach/timex.h
View File

@ -1,9 +0,0 @@
/*
* arch/arm/mach-mv78xx0/include/mach/timex.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define CLOCK_TICK_RATE (100 * HZ)

20
arch/arm/mach-netx/include/mach/timex.h
View File

@ -1,20 +0,0 @@
/*
* arch/arm/mach-netx/include/mach/timex.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define CLOCK_TICK_RATE 100000000

11
arch/arm/mach-netx/time.c
View File

@ -28,6 +28,9 @@
#include <asm/mach/time.h>
#include <mach/netx-regs.h>
#define NETX_CLOCK_FREQ 100000000
#define NETX_LATCH DIV_ROUND_CLOSEST(NETX_CLOCK_FREQ, HZ)
#define TIMER_CLOCKEVENT 0
#define TIMER_CLOCKSOURCE 1
@ -41,7 +44,7 @@ static void netx_set_mode(enum clock_event_mode mode,
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
writel(LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
tmode = NETX_GPIO_COUNTER_CTRL_RST_EN |
NETX_GPIO_COUNTER_CTRL_IRQ_EN |
NETX_GPIO_COUNTER_CTRL_RUN;
@ -114,7 +117,7 @@ void __init netx_timer_init(void)
/* Reset the timer value to zero */
writel(0, NETX_GPIO_COUNTER_CURRENT(0));
writel(LATCH, NETX_GPIO_COUNTER_MAX(0));
writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(0));
/* acknowledge interrupt */
writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
@ -137,11 +140,11 @@ void __init netx_timer_init(void)
NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
"netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up);
"netx_timer", NETX_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up);
/* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
* Adding some safety ... */
netx_clockevent.cpumask = cpumask_of(0);
clockevents_config_and_register(&netx_clockevent, CLOCK_TICK_RATE,
clockevents_config_and_register(&netx_clockevent, NETX_CLOCK_FREQ,
0xa00, 0xfffffffe);
}

5
arch/arm/mach-omap1/include/mach/timex.h
View File

@ -1,5 +0,0 @@
/*
* arch/arm/mach-omap1/include/mach/timex.h
*/
#include <plat/timex.h>

5
arch/arm/mach-omap2/include/mach/timex.h
View File

@ -1,5 +0,0 @@
/*
* arch/arm/mach-omap2/include/mach/timex.h
*/
#include <plat/timex.h>

11
arch/arm/mach-orion5x/include/mach/timex.h
View File

@ -1,11 +0,0 @@
/*
* arch/arm/mach-orion5x/include/mach/timex.h
*
* Tzachi Perelstein <tzachi@marvell.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define CLOCK_TICK_RATE (100 * HZ)

34
arch/arm/mach-pxa/include/mach/timex.h
View File

@ -1,34 +0,0 @@
/*
* arch/arm/mach-pxa/include/mach/timex.h
*
* Author: Nicolas Pitre
* Created: Jun 15, 2001
* Copyright: MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* Various drivers are still using the constant of CLOCK_TICK_RATE, for
* those drivers to at least work, the definition is provided here.
*
* NOTE: this is no longer accurate when multiple processors and boards
* are selected, newer drivers should not depend on this any more. Use
* either the clocksource/clockevent or get this at run-time by calling
* get_clock_tick_rate() (as defined in generic.c).
*/
#if defined(CONFIG_PXA25x)
/* PXA250/210 timer base */
#define CLOCK_TICK_RATE 3686400
#elif defined(CONFIG_PXA27x)
/* PXA27x timer base */
#ifdef CONFIG_MACH_MAINSTONE
#define CLOCK_TICK_RATE 3249600
#else
#define CLOCK_TICK_RATE 3250000
#endif
#else
#define CLOCK_TICK_RATE 3250000
#endif

23
arch/arm/mach-realview/include/mach/timex.h
View File

@ -1,23 +0,0 @@
/*
* arch/arm/mach-realview/include/mach/timex.h
*
* RealView architecture timex specifications
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define CLOCK_TICK_RATE (50000000 / 16)

17
arch/arm/mach-rpc/include/mach/timex.h
View File

@ -1,17 +0,0 @@
/*
* arch/arm/mach-rpc/include/mach/timex.h
*
* Copyright (C) 1997, 1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* RiscPC architecture timex specifications
*/
/*
* On the RiscPC, the clock ticks at 2MHz.
*/
#define CLOCK_TICK_RATE 2000000

15
arch/arm/mach-rpc/time.c
View File

@ -24,6 +24,9 @@
#include <asm/mach/time.h>
#define RPC_CLOCK_FREQ 2000000
#define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ)
static u32 ioc_timer_gettimeoffset(void)
{
unsigned int count1, count2, status;
@ -46,23 +49,23 @@ static u32 ioc_timer_gettimeoffset(void)
* and count2.
*/
if (status & (1 << 5))
offset -= LATCH;
offset -= RPC_LATCH;
} else if (count2 > count1) {
/*
* We have just had another interrupt between reading
* count1 and count2.
*/
offset -= LATCH;
offset -= RPC_LATCH;
}
offset = (LATCH - offset) * (tick_nsec / 1000);
return ((offset + LATCH/2) / LATCH) * 1000;
offset = (RPC_LATCH - offset) * (tick_nsec / 1000);
return DIV_ROUND_CLOSEST(offset, RPC_LATCH) * 1000;
}
void __init ioctime_init(void)
{
ioc_writeb(LATCH & 255, IOC_T0LTCHL);
ioc_writeb(LATCH >> 8, IOC_T0LTCHH);
ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL);
ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH);
ioc_writeb(0, IOC_T0GO);
}

24
arch/arm/mach-s3c24xx/include/mach/timex.h
View File

@ -1,24 +0,0 @@
/* arch/arm/mach-s3c2410/include/mach/timex.h
*
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
* a variable is useless. It seems as long as we make our timers an
* exact multiple of HZ, any value that makes a 1->1 correspondence
* for the time conversion functions to/from jiffies is acceptable.
*/
#define CLOCK_TICK_RATE 12000000
#endif /* __ASM_ARCH_TIMEX_H */

24
arch/arm/mach-s3c64xx/include/mach/timex.h
View File

@ -1,24 +0,0 @@
/* arch/arm/mach-s3c64xx/include/mach/timex.h
*
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C6400 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
* a variable is useless. It seems as long as we make our timers an
* exact multiple of HZ, any value that makes a 1->1 correspondence
* for the time conversion functions to/from jiffies is acceptable.
*/
#define CLOCK_TICK_RATE 12000000
#endif /* __ASM_ARCH_TIMEX_H */

27
arch/arm/mach-s5p64x0/include/mach/timex.h
View File

@ -1,27 +0,0 @@
/* linux/arch/arm/mach-s5p64x0/include/mach/timex.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S5P64X0 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
* a variable is useless. It seems as long as we make our timers an
* exact multiple of HZ, any value that makes a 1->1 correspondence
* for the time conversion functions to/from jiffies is acceptable.
*/
#define CLOCK_TICK_RATE 12000000
#endif /* __ASM_ARCH_TIMEX_H */

24
arch/arm/mach-s5pc100/include/mach/timex.h
View File

@ -1,24 +0,0 @@
/* arch/arm/mach-s5pc100/include/mach/timex.h
*
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C6400 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
* a variable is useless. It seems as long as we make our timers an
* exact multiple of HZ, any value that makes a 1->1 correspondence
* for the time conversion functions to/from jiffies is acceptable.
*/
#define CLOCK_TICK_RATE 12000000
#endif /* __ASM_ARCH_TIMEX_H */

29
arch/arm/mach-s5pv210/include/mach/timex.h
View File

@ -1,29 +0,0 @@
/* linux/arch/arm/mach-s5pv210/include/mach/timex.h
*
* Copyright (c) 2003-2010 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Based on arch/arm/mach-s5p6442/include/mach/timex.h
*
* S5PV210 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H __FILE__
/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
* a variable is useless. It seems as long as we make our timers an
* exact multiple of HZ, any value that makes a 1->1 correspondence
* for the time conversion functions to/from jiffies is acceptable.
*/
#define CLOCK_TICK_RATE 12000000
#endif /* __ASM_ARCH_TIMEX_H */

12
arch/arm/mach-sa1100/include/mach/timex.h
View File

@ -1,12 +0,0 @@
/*
* arch/arm/mach-sa1100/include/mach/timex.h
*
* SA1100 architecture timex specifications
*
* Copyright (C) 1998
*/
/*
* SA1100 timer
*/
#define CLOCK_TICK_RATE 3686400

8
arch/arm/mach-sa1100/time.c
View File

@ -9,6 +9,7 @@
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
@ -20,6 +21,9 @@
#include <mach/hardware.h>
#include <mach/irqs.h>
#define SA1100_CLOCK_FREQ 3686400
#define SA1100_LATCH DIV_ROUND_CLOSEST(SA1100_CLOCK_FREQ, HZ)
static u64 notrace sa1100_read_sched_clock(void)
{
return readl_relaxed(OSCR);
@ -93,7 +97,7 @@ static void sa1100_timer_resume(struct clock_event_device *cedev)
/*
* OSMR0 is the system timer: make sure OSCR is sufficiently behind
*/
writel_relaxed(OSMR0 - LATCH, OSCR);
writel_relaxed(OSMR0 - SA1100_LATCH, OSCR);
}
#else
#define sa1100_timer_suspend NULL
@ -128,7 +132,7 @@ void __init sa1100_timer_init(void)
setup_irq(IRQ_OST0, &sa1100_timer_irq);
clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
clocksource_mmio_init(OSCR, "oscr", SA1100_CLOCK_FREQ, 200, 32,
clocksource_mmio_readl_up);
clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400,
MIN_OSCR_DELTA * 2, 0x7fffffff);

6
arch/arm/mach-shmobile/include/mach/timex.h
View File

@ -1,6 +0,0 @@
#ifndef __ASM_MACH_TIMEX_H
#define __ASM_MACH_TIMEX_H
#define CLOCK_TICK_RATE 1193180 /* unused i8253 PIT value */
#endif /* __ASM_MACH_TIMEX_H */

19
arch/arm/mach-spear/include/mach/timex.h
View File

@ -1,19 +0,0 @@
/*
* arch/arm/plat-spear/include/plat/timex.h
*
* SPEAr platform specific timex definitions
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar <viresh.linux@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __PLAT_TIMEX_H
#define __PLAT_TIMEX_H
#define CLOCK_TICK_RATE 48000000
#endif /* __PLAT_TIMEX_H */

23
arch/arm/mach-versatile/include/mach/timex.h
View File

@ -1,23 +0,0 @@
/*
* arch/arm/mach-versatile/include/mach/timex.h
*
* Versatile architecture timex specifications
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define CLOCK_TICK_RATE (50000000 / 16)

25
arch/arm/mach-w90x900/include/mach/timex.h
View File

@ -1,25 +0,0 @@
/*
* arch/arm/mach-w90x900/include/mach/timex.h
*
* Copyright (c) 2008 Nuvoton technology corporation
* All rights reserved.
*
* Wan ZongShun <mcuos.com@gmail.com>
*
* Based on arch/arm/mach-s3c2410/include/mach/timex.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
/* CLOCK_TICK_RATE Now, I don't use it. */
#define CLOCK_TICK_RATE 15000000
#endif /* __ASM_ARCH_TIMEX_H */

33
arch/arm/plat-omap/include/plat/timex.h
View File

@ -1,33 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/timex.h
*
* Copyright (C) 2000 RidgeRun, Inc.
* Author: Greg Lonnon <glonnon@ridgerun.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(__ASM_ARCH_OMAP_TIMEX_H)
#define __ASM_ARCH_OMAP_TIMEX_H
#define CLOCK_TICK_RATE (HZ * 100000UL)
#endif /* __ASM_ARCH_OMAP_TIMEX_H */

13
drivers/clocksource/timer-marco.c
View File

@ -19,7 +19,8 @@
#include <linux/of_irq.h>
#include <linux/of_address.h>
#include <linux/sched_clock.h>
#include <asm/mach/time.h>
#define MARCO_CLOCK_FREQ 1000000
#define SIRFSOC_TIMER_32COUNTER_0_CTRL 0x0000
#define SIRFSOC_TIMER_32COUNTER_1_CTRL 0x0004
@ -191,7 +192,7 @@ static int sirfsoc_local_timer_setup(struct clock_event_device *ce)
ce->rating = 200;
ce->set_mode = sirfsoc_timer_set_mode;
ce->set_next_event = sirfsoc_timer_set_next_event;
clockevents_calc_mult_shift(ce, CLOCK_TICK_RATE, 60);
clockevents_calc_mult_shift(ce, MARCO_CLOCK_FREQ, 60);
ce->max_delta_ns = clockevent_delta2ns(-2, ce);
ce->min_delta_ns = clockevent_delta2ns(2, ce);
ce->cpumask = cpumask_of(cpu);
@ -263,11 +264,11 @@ static void __init sirfsoc_marco_timer_init(void)
BUG_ON(IS_ERR(clk));
rate = clk_get_rate(clk);
BUG_ON(rate < CLOCK_TICK_RATE);
BUG_ON(rate % CLOCK_TICK_RATE);
BUG_ON(rate < MARCO_CLOCK_FREQ);
BUG_ON(rate % MARCO_CLOCK_FREQ);
/* Initialize the timer dividers */
timer_div = rate / CLOCK_TICK_RATE - 1;
timer_div = rate / MARCO_CLOCK_FREQ - 1;
writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);
writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL);
writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_1_CTRL);
@ -283,7 +284,7 @@ static void __init sirfsoc_marco_timer_init(void)
/* Clear all interrupts */
writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, MARCO_CLOCK_FREQ));
sirfsoc_clockevent_init();
}

16
drivers/clocksource/timer-prima2.c
View File

@ -21,6 +21,8 @@
#include <linux/sched_clock.h>
#include <asm/mach/time.h>
#define PRIMA2_CLOCK_FREQ 1000000
#define SIRFSOC_TIMER_COUNTER_LO 0x0000
#define SIRFSOC_TIMER_COUNTER_HI 0x0004
#define SIRFSOC_TIMER_MATCH_0 0x0008
@ -173,7 +175,7 @@ static u64 notrace sirfsoc_read_sched_clock(void)
static void __init sirfsoc_clockevent_init(void)
{
sirfsoc_clockevent.cpumask = cpumask_of(0);
clockevents_config_and_register(&sirfsoc_clockevent, CLOCK_TICK_RATE,
clockevents_config_and_register(&sirfsoc_clockevent, PRIMA2_CLOCK_FREQ,
2, -2);
}
@ -190,8 +192,8 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
rate = clk_get_rate(clk);
BUG_ON(rate < CLOCK_TICK_RATE);
BUG_ON(rate % CLOCK_TICK_RATE);
BUG_ON(rate < PRIMA2_CLOCK_FREQ);
BUG_ON(rate % PRIMA2_CLOCK_FREQ);
sirfsoc_timer_base = of_iomap(np, 0);
if (!sirfsoc_timer_base)
@ -199,14 +201,16 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
sirfsoc_timer_irq.irq = irq_of_parse_and_map(np, 0);
writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
writel_relaxed(rate / PRIMA2_CLOCK_FREQ / 2 - 1,
sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
BUG_ON(clocksource_register_hz(&sirfsoc_clocksource,
PRIMA2_CLOCK_FREQ));
sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE);
sched_clock_register(sirfsoc_read_sched_clock, 64, PRIMA2_CLOCK_FREQ);
BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));

2
drivers/input/misc/ixp4xx-beeper.c
View File

@ -67,7 +67,7 @@ static int ixp4xx_spkr_event(struct input_dev *dev, unsigned int type, unsigned
}
if (value > 20 && value < 32767)
count = (IXP4XX_TIMER_FREQ / (value * 4)) - 1;
count = (ixp4xx_timer_freq / (value * 4)) - 1;
ixp4xx_spkr_control(pin, count);

2
drivers/rtc/rtc-at91sam9.c
View File

@ -24,7 +24,7 @@
#include <mach/at91_rtt.h>
#include <mach/cpu.h>
#include <mach/hardware.h>
/*
* This driver uses two configurable hardware resources that live in the

1
drivers/rtc/rtc-pxa.c
View File

@ -32,7 +32,6 @@
#include <mach/hardware.h>
#define TIMER_FREQ CLOCK_TICK_RATE
#define RTC_DEF_DIVIDER (32768 - 1)
#define RTC_DEF_TRIM 0
#define MAXFREQ_PERIODIC 1000

49
drivers/tty/serial/atmel_serial.c
View File

@ -35,21 +35,18 @@
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/dma-mapping.h>
#include <linux/atmel_pdc.h>
#include <linux/atmel_serial.h>
#include <linux/uaccess.h>
#include <linux/platform_data/atmel.h>
#include <linux/timer.h>
#include <linux/gpio.h>
#include <asm/io.h>
#include <asm/ioctls.h>
#ifdef CONFIG_ARM
#include <mach/cpu.h>
#include <asm/gpio.h>
#endif
#define PDC_BUFFER_SIZE 512
/* Revisit: We should calculate this based on the actual port settings */
#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
@ -168,6 +165,7 @@ struct atmel_uart_port {
struct circ_buf rx_ring;
struct serial_rs485 rs485; /* rs485 settings */
int rts_gpio; /* optional RTS GPIO */
unsigned int tx_done_mask;
bool is_usart; /* usart or uart */
struct timer_list uart_timer; /* uart timer */
@ -301,20 +299,16 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
unsigned int mode;
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
#ifdef CONFIG_ARCH_AT91RM9200
if (cpu_is_at91rm9200()) {
/*
* AT91RM9200 Errata #39: RTS0 is not internally connected
* to PA21. We need to drive the pin manually.
*/
if (port->mapbase == AT91RM9200_BASE_US0) {
if (mctrl & TIOCM_RTS)
at91_set_gpio_value(AT91_PIN_PA21, 0);
else
at91_set_gpio_value(AT91_PIN_PA21, 1);
}
/*
* AT91RM9200 Errata #39: RTS0 is not internally connected
* to PA21. We need to drive the pin as a GPIO.
*/
if (gpio_is_valid(atmel_port->rts_gpio)) {
if (mctrl & TIOCM_RTS)
gpio_set_value(atmel_port->rts_gpio, 0);
else
gpio_set_value(atmel_port->rts_gpio, 1);
}
#endif
if (mctrl & TIOCM_RTS)
control |= ATMEL_US_RTSEN;
@ -2389,6 +2383,25 @@ static int atmel_serial_probe(struct platform_device *pdev)
port = &atmel_ports[ret];
port->backup_imr = 0;
port->uart.line = ret;
port->rts_gpio = -EINVAL; /* Invalid, zero could be valid */
if (pdata)
port->rts_gpio = pdata->rts_gpio;
else if (np)
port->rts_gpio = of_get_named_gpio(np, "rts-gpios", 0);
if (gpio_is_valid(port->rts_gpio)) {
ret = devm_gpio_request(&pdev->dev, port->rts_gpio, "RTS");
if (ret) {
dev_err(&pdev->dev, "error requesting RTS GPIO\n");
goto err;
}
/* Default to 1 as RTS is active low */
ret = gpio_direction_output(port->rts_gpio, 1);
if (ret) {
dev_err(&pdev->dev, "error setting up RTS GPIO\n");
goto err;
}
}
ret = atmel_init_port(port, pdev);
if (ret)

1
include/linux/platform_data/atmel.h
View File

@ -84,6 +84,7 @@ struct atmel_uart_data {
short use_dma_rx; /* use receive DMA? */
void __iomem *regs; /* virt. base address, if any */
struct serial_rs485 rs485; /* rs485 settings */
int rts_gpio; /* optional RTS GPIO */
};
/* Touchscreen Controller */