Staging: dt3155: coding style cleanups for the .h files
This cleans up some of the coding style issues in the .h files. More remains to be done. Cc: Scott Smedley <ss@aao.gov.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
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@ -1,7 +1,7 @@
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/*
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Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
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Jason Lapenta, Scott Smedley
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Jason Lapenta, Scott Smedley
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This file is part of the DT3155 Device Driver.
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@ -20,8 +20,6 @@ along with the DT3155 Device Driver; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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MA 02111-1307 USA
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$Id: dt3155.h,v 1.11 2005/08/09 06:08:51 ssmedley Exp $
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-- Changes --
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Date Programmer Description of changes made
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@ -56,120 +54,118 @@ MA 02111-1307 USA
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/* Can be 1 or 2 */
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#define MAXBOARDS 1
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#define BOARD_MAX_BUFFS 3
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#define MAXBUFFERS BOARD_MAX_BUFFS*MAXBOARDS
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#define BOARD_MAX_BUFFS 3
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#define MAXBUFFERS (BOARD_MAX_BUFFS*MAXBOARDS)
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#define PCI_PAGE_SIZE (1 << 12)
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#define PCI_PAGE_SIZE (1 << 12)
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#ifdef CCIR
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#define DT3155_MAX_ROWS 576
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#define DT3155_MAX_COLS 768
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#define FORMAT50HZ TRUE
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#define DT3155_MAX_ROWS 576
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#define DT3155_MAX_COLS 768
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#define FORMAT50HZ TRUE
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#else
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#define DT3155_MAX_ROWS 480
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#define DT3155_MAX_COLS 640
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#define FORMAT50HZ FALSE
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#define DT3155_MAX_ROWS 480
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#define DT3155_MAX_COLS 640
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#define FORMAT50HZ FALSE
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#endif
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/* Configuration structure */
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struct dt3155_config_s {
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u_int acq_mode;
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u_int cols, rows;
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u_int continuous;
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u_int acq_mode;
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u_int cols, rows;
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u_int continuous;
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};
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/* hold data for each frame */
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typedef struct
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{
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u_long addr; /* address of the buffer with the frame */
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u_long tag; /* unique number for the frame */
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struct timeval time; /* time that capture took place */
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typedef struct {
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u_long addr; /* address of the buffer with the frame */
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u_long tag; /* unique number for the frame */
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struct timeval time; /* time that capture took place */
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} frame_info_t;
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/* Structure for interrupt and buffer handling. */
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/* This is the setup for 1 card */
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/*
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* Structure for interrupt and buffer handling.
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* This is the setup for 1 card
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*/
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struct dt3155_fbuffer_s {
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int nbuffers;
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int nbuffers;
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frame_info_t frame_info[ BOARD_MAX_BUFFS ];
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frame_info_t frame_info[BOARD_MAX_BUFFS];
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int empty_buffers[ BOARD_MAX_BUFFS ]; /* indexes empty frames */
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int empty_len; /* Number of empty buffers */
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/* Zero means empty */
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int empty_buffers[BOARD_MAX_BUFFS]; /* indexes empty frames */
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int empty_len; /* Number of empty buffers */
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/* Zero means empty */
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int active_buf; /* Where data is currently dma'ing */
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int locked_buf; /* Buffers used by user */
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int active_buf; /* Where data is currently dma'ing */
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int locked_buf; /* Buffers used by user */
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int ready_que[ BOARD_MAX_BUFFS ];
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u_long ready_head; /* The most recent buffer located here */
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u_long ready_len; /* The number of ready buffers */
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int ready_que[BOARD_MAX_BUFFS];
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u_long ready_head; /* The most recent buffer located here */
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u_long ready_len; /* The number of ready buffers */
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int even_happened;
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int even_stopped;
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int stop_acquire; /* Flag to stop interrupts */
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u_long frame_count; /* Counter for frames acquired by this card */
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int even_happened;
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int even_stopped;
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int stop_acquire; /* Flag to stop interrupts */
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u_long frame_count; /* Counter for frames acquired by this card */
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};
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#define DT3155_MODE_FRAME 1
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#define DT3155_MODE_FIELD 2
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#define DT3155_MODE_FRAME 1
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#define DT3155_MODE_FIELD 2
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#define DT3155_SNAP 1
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#define DT3155_ACQ 2
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#define DT3155_SNAP 1
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#define DT3155_ACQ 2
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/* There is one status structure for each card. */
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typedef struct dt3155_status_s
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{
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int fixed_mode; /* if 1, we are in fixed frame mode */
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u_long reg_addr; /* Register address for a single card */
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u_long mem_addr; /* Buffer start addr for this card */
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u_long mem_size; /* This is the amount of mem available */
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u_int irq; /* this card's irq */
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struct dt3155_config_s config; /* configuration struct */
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struct dt3155_fbuffer_s fbuffer;/* frame buffer state struct */
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u_long state; /* this card's state */
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u_int device_installed; /* Flag if installed. 1=installed */
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typedef struct dt3155_status_s {
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int fixed_mode; /* if 1, we are in fixed frame mode */
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u_long reg_addr; /* Register address for a single card */
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u_long mem_addr; /* Buffer start addr for this card */
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u_long mem_size; /* This is the amount of mem available */
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u_int irq; /* this card's irq */
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struct dt3155_config_s config; /* configuration struct */
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struct dt3155_fbuffer_s fbuffer; /* frame buffer state struct */
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u_long state; /* this card's state */
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u_int device_installed; /* Flag if installed. 1=installed */
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} dt3155_status_t;
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/* Reference to global status structure */
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extern struct dt3155_status_s dt3155_status[MAXBOARDS];
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#define DT3155_STATE_IDLE 0x00
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#define DT3155_STATE_FRAME 0x01
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#define DT3155_STATE_FLD 0x02
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#define DT3155_STATE_STOP 0x100
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#define DT3155_STATE_ERROR 0x200
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#define DT3155_STATE_MODE 0x0ff
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#define DT3155_STATE_IDLE 0x00
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#define DT3155_STATE_FRAME 0x01
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#define DT3155_STATE_FLD 0x02
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#define DT3155_STATE_STOP 0x100
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#define DT3155_STATE_ERROR 0x200
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#define DT3155_STATE_MODE 0x0ff
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#define DT3155_IOC_MAGIC '!'
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#define DT3155_IOC_MAGIC '!'
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#define DT3155_SET_CONFIG _IOW( DT3155_IOC_MAGIC, 1, struct dt3155_config_s )
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#define DT3155_GET_CONFIG _IOR( DT3155_IOC_MAGIC, 2, struct dt3155_status_s )
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#define DT3155_STOP _IO( DT3155_IOC_MAGIC, 3 )
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#define DT3155_START _IO( DT3155_IOC_MAGIC, 4 )
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#define DT3155_FLUSH _IO( DT3155_IOC_MAGIC, 5 )
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#define DT3155_IOC_MAXNR 5
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#define DT3155_SET_CONFIG _IOW(DT3155_IOC_MAGIC, 1, struct dt3155_config_s)
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#define DT3155_GET_CONFIG _IOR(DT3155_IOC_MAGIC, 2, struct dt3155_status_s)
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#define DT3155_STOP _IO(DT3155_IOC_MAGIC, 3)
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#define DT3155_START _IO(DT3155_IOC_MAGIC, 4)
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#define DT3155_FLUSH _IO(DT3155_IOC_MAGIC, 5)
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#define DT3155_IOC_MAXNR 5
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/* Error codes */
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#define DT_ERR_NO_BUFFERS 0x10000 /* not used but it might be one day - SS */
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#define DT_ERR_CORRUPT 0x20000
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#define DT_ERR_OVERRUN 0x30000
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#define DT_ERR_I2C_TIMEOUT 0x40000
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#define DT_ERR_MASK 0xff0000/* not used but it might be one day - SS */
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#define DT_ERR_NO_BUFFERS 0x10000 /* not used but it might be one day */
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#define DT_ERR_CORRUPT 0x20000
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#define DT_ERR_OVERRUN 0x30000
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#define DT_ERR_I2C_TIMEOUT 0x40000
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#define DT_ERR_MASK 0xff0000/* not used but it might be one day */
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/* User code will probably want to declare one of these for each card */
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typedef struct dt3155_read_s
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{
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u_long offset;
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u_long frame_seq;
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u_long state;
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typedef struct dt3155_read_s {
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u_long offset;
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u_long frame_seq;
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u_long state;
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frame_info_t frame_info;
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frame_info_t frame_info;
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} dt3155_read_t;
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#endif /* _DT3155_inc */
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@ -1,7 +1,7 @@
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/*
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Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
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Scott Smedley
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Scott Smedley
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This file is part of the DT3155 Device Driver.
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@ -25,7 +25,7 @@ MA 02111-1307 USA
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#define DT3155_DRV_INC
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/* kernel logical address of the frame grabbers */
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extern u_char *dt3155_lbase[ MAXBOARDS ];
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extern u_char *dt3155_lbase[MAXBOARDS];
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/* kernel logical address of ram buffer */
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extern u_char *dt3155_bbase;
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@ -35,7 +35,7 @@ extern u_char *dt3155_bbase;
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#include <linux/version.h> /* need access to LINUX_VERSION_CODE */
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/* wait queue for reads */
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,1)
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 3, 1)
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extern wait_queue_head_t dt3155_read_wait_queue[MAXBOARDS];
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#else
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extern struct wait_queue *dt3155_read_wait_queue[MAXBOARDS];
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@ -1,7 +1,7 @@
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/*
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Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
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Jason Lapenta, Scott Smedley
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Jason Lapenta, Scott Smedley
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This file is part of the DT3155 Device Driver.
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@ -36,8 +36,8 @@ MA 02111-1307 USA
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/* macros to access registers */
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#define WriteMReg(Address, Data) * ((u_long *) (Address)) = Data
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#define ReadMReg(Address, Data) Data = * ((u_long *) (Address))
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#define WriteMReg(Address, Data) (*((u_long *)(Address)) = Data)
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#define ReadMReg(Address, Data) (Data = *((u_long *)(Address)))
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/***************** 32 bit register globals **************/
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@ -240,12 +240,11 @@ typedef union iic_csr2_tag {
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* dma_upper_lmt_tag
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*/
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typedef union dma_upper_lmt_tag {
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u_long reg;
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struct
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{
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u_long DMA_UPPER_LMT_VAL : 24;
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u_long : 8;
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} fld;
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u_long reg;
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struct {
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u_long DMA_UPPER_LMT_VAL:24;
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u_long :8;
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} fld;
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} DMA_UPPER_LMT_R;
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@ -253,12 +252,12 @@ typedef union dma_upper_lmt_tag {
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* Global declarations of local copies
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* of boards' 32 bit registers
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***************************************/
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extern u_long even_dma_start_r; /* bit 0 should always be 0 */
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extern u_long odd_dma_start_r; /* .. */
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extern u_long even_dma_stride_r; /* bits 0&1 should always be 0 */
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extern u_long odd_dma_stride_r; /* .. */
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extern u_long even_pixel_fmt_r;
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extern u_long odd_pixel_fmt_r;
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extern u_long even_dma_start_r; /* bit 0 should always be 0 */
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extern u_long odd_dma_start_r; /* .. */
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extern u_long even_dma_stride_r; /* bits 0&1 should always be 0 */
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extern u_long odd_dma_stride_r; /* .. */
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extern u_long even_pixel_fmt_r;
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extern u_long odd_pixel_fmt_r;
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extern FIFO_TRIGGER_R fifo_trigger_r;
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extern XFER_MODE_R xfer_mode_r;
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extern RETRY_WAIT_CNT_R retry_wait_cnt_r;
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extern INT_CSR_R int_csr_r;
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extern u_long even_fld_mask_r;
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extern u_long odd_fld_mask_r;
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extern u_long even_fld_mask_r;
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extern u_long odd_fld_mask_r;
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extern MASK_LENGTH_R mask_length_r;
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extern FIFO_FLAG_CNT_R fifo_flag_cnt_r;
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/******** Assignments and Typedefs for 8 bit I2C Registers********************/
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typedef union i2c_csr2_tag {
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u_char reg;
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struct
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{
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u_char CHROM_FIL : 1;
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u_char SYNC_SNTL : 1;
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u_char HZ50 : 1;
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u_char SYNC_PRESENT : 1;
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u_char BUSY_EVE : 1;
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u_char BUSY_ODD : 1;
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u_char DISP_PASS : 1;
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} fld;
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u_char reg;
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struct {
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u_char CHROM_FIL:1;
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u_char SYNC_SNTL:1;
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u_char HZ50:1;
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u_char SYNC_PRESENT:1;
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u_char BUSY_EVE:1;
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u_char BUSY_ODD:1;
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u_char DISP_PASS:1;
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} fld;
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} I2C_CSR2;
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typedef union i2c_even_csr_tag {
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u_char reg;
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struct
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{
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u_char DONE_EVE : 1;
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u_char SNGL_EVE : 1;
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u_char ERROR_EVE : 1;
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u_char : 5;
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} fld;
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u_char reg;
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struct {
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u_char DONE_EVE:1;
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u_char SNGL_EVE:1;
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u_char ERROR_EVE:1;
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u_char :5;
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} fld;
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} I2C_EVEN_CSR;
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typedef union i2c_odd_csr_tag {
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/* access 8-bit IIC registers */
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extern int ReadI2C (u_char * lpReg, u_short wIregIndex, u_char * byVal);
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extern int WriteI2C (u_char * lpReg, u_short wIregIndex, u_char byVal);
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extern int ReadI2C(u_char *lpReg, u_short wIregIndex, u_char *byVal);
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extern int WriteI2C(u_char *lpReg, u_short wIregIndex, u_char byVal);
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#endif
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@ -1,7 +1,7 @@
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/*
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Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
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Jason Lapenta, Scott Smedley
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Jason Lapenta, Scott Smedley
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This file is part of the DT3155 Device Driver.
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@ -33,8 +33,8 @@ MA 02111-1307 USA
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*/
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#ifndef DT3155_ISR_H
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#define DT3155_ISR_H
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#ifndef DT3155_ISR_H
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#define DT3155_ISR_H
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extern struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS];
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* Simple array based que struct
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**********************************/
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bool are_empty_buffers( int minor );
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void push_empty( int index, int minor );
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bool are_empty_buffers(int minor);
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void push_empty(int index, int minor);
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int pop_empty( int minor );
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int pop_empty(int minor);
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bool is_ready_buf_empty( int minor );
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bool is_ready_buf_full( int minor );
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bool is_ready_buf_empty(int minor);
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bool is_ready_buf_full(int minor);
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void push_ready( int minor, int index );
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int pop_ready( int minor );
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void push_ready(int minor, int index);
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int pop_ready(int minor);
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#endif
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