net: macb: Added ZynqMP-specific initialization
The GEM controllers on ZynqMP were missing some initialization steps which are required in some cases when using SGMII mode, which uses the PS-GTR transceivers managed by the phy-zynqmp driver. The GEM core appears to need a hardware-level reset in order to work properly in SGMII mode in cases where the GT reference clock was not present at initial power-on. This can be done using a reset mapped to the zynqmp-reset driver in the device tree. Also, when in SGMII mode, the GEM driver needs to ensure the PHY is initialized and powered on. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -12,6 +12,7 @@
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#include <linux/ptp_clock_kernel.h>
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#include <linux/net_tstamp.h>
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#include <linux/interrupt.h>
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#include <linux/phy/phy.h>
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#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) || defined(CONFIG_MACB_USE_HWSTAMP)
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#define MACB_EXT_DESC
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@ -1291,6 +1292,9 @@ struct macb {
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u32 wol;
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struct macb_ptp_info *ptp_info; /* macb-ptp interface */
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struct phy *sgmii_phy; /* for ZynqMP SGMII mode */
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#ifdef MACB_EXT_DESC
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uint8_t hw_dma_cap;
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#endif
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@ -34,7 +34,9 @@
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#include <linux/udp.h>
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#include <linux/tcp.h>
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#include <linux/iopoll.h>
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#include <linux/phy/phy.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include "macb.h"
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/* This structure is only used for MACB on SiFive FU540 devices */
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@ -2739,10 +2741,14 @@ static int macb_open(struct net_device *dev)
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macb_init_hw(bp);
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err = macb_phylink_connect(bp);
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err = phy_power_on(bp->sgmii_phy);
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if (err)
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goto reset_hw;
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err = macb_phylink_connect(bp);
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if (err)
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goto phy_off;
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netif_tx_start_all_queues(dev);
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if (bp->ptp_info)
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@ -2750,6 +2756,9 @@ static int macb_open(struct net_device *dev)
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return 0;
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phy_off:
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phy_power_off(bp->sgmii_phy);
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reset_hw:
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macb_reset_hw(bp);
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for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue)
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@ -2775,6 +2784,8 @@ static int macb_close(struct net_device *dev)
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phylink_stop(bp->phylink);
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phylink_disconnect_phy(bp->phylink);
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phy_power_off(bp->sgmii_phy);
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spin_lock_irqsave(&bp->lock, flags);
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macb_reset_hw(bp);
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netif_carrier_off(dev);
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@ -4544,13 +4555,55 @@ static const struct macb_config np4_config = {
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.usrio = &macb_default_usrio,
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};
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static int zynqmp_init(struct platform_device *pdev)
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{
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struct net_device *dev = platform_get_drvdata(pdev);
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struct macb *bp = netdev_priv(dev);
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int ret;
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if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) {
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/* Ensure PS-GTR PHY device used in SGMII mode is ready */
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bp->sgmii_phy = devm_phy_get(&pdev->dev, "sgmii-phy");
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if (IS_ERR(bp->sgmii_phy)) {
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ret = PTR_ERR(bp->sgmii_phy);
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dev_err_probe(&pdev->dev, ret,
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"failed to get PS-GTR PHY\n");
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return ret;
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}
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ret = phy_init(bp->sgmii_phy);
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if (ret) {
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dev_err(&pdev->dev, "failed to init PS-GTR PHY: %d\n",
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ret);
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return ret;
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}
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}
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/* Fully reset GEM controller at hardware level using zynqmp-reset driver,
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* if mapped in device tree.
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*/
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ret = device_reset_optional(&pdev->dev);
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if (ret) {
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dev_err_probe(&pdev->dev, ret, "failed to reset controller");
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phy_exit(bp->sgmii_phy);
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return ret;
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}
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ret = macb_init(pdev);
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if (ret)
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phy_exit(bp->sgmii_phy);
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return ret;
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}
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static const struct macb_config zynqmp_config = {
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.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE |
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MACB_CAPS_JUMBO |
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MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH,
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.dma_burst_length = 16,
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.clk_init = macb_clk_init,
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.init = macb_init,
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.init = zynqmp_init,
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.jumbo_max_len = 10240,
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.usrio = &macb_default_usrio,
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};
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@ -4767,7 +4820,7 @@ static int macb_probe(struct platform_device *pdev)
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err = macb_mii_init(bp);
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if (err)
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goto err_out_free_netdev;
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goto err_out_phy_exit;
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netif_carrier_off(dev);
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@ -4792,6 +4845,9 @@ err_out_unregister_mdio:
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mdiobus_unregister(bp->mii_bus);
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mdiobus_free(bp->mii_bus);
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err_out_phy_exit:
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phy_exit(bp->sgmii_phy);
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err_out_free_netdev:
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free_netdev(dev);
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@ -4813,6 +4869,7 @@ static int macb_remove(struct platform_device *pdev)
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if (dev) {
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bp = netdev_priv(dev);
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phy_exit(bp->sgmii_phy);
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mdiobus_unregister(bp->mii_bus);
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mdiobus_free(bp->mii_bus);
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