drm/radeon/dpm: implement force performance levels for 7xx/eg/btc
Allows you to limit the selected power levels via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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70d01a5ee2
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@ -2326,9 +2326,9 @@ int btc_dpm_set_power_state(struct radeon_device *rdev)
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return ret;
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}
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ret = rv770_unrestrict_performance_levels_after_switch(rdev);
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ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
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if (ret) {
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DRM_ERROR("rv770_unrestrict_performance_levels_after_switch failed\n");
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DRM_ERROR("rv770_dpm_force_performance_level failed\n");
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return ret;
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}
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@ -2014,9 +2014,9 @@ int cypress_dpm_set_power_state(struct radeon_device *rdev)
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if (eg_pi->pcie_performance_request)
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cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps);
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ret = rv770_unrestrict_performance_levels_after_switch(rdev);
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ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
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if (ret) {
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DRM_ERROR("rv770_unrestrict_performance_levels_after_switch failed\n");
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DRM_ERROR("rv770_dpm_force_performance_level failed\n");
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return ret;
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}
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@ -71,6 +71,8 @@ typedef uint8_t PPSMC_Result;
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#define PPSMC_MSG_SwitchToSwState ((uint8_t)0x20)
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#define PPSMC_MSG_SwitchToInitialState ((uint8_t)0x40)
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#define PPSMC_MSG_NoForcedLevel ((uint8_t)0x41)
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#define PPSMC_MSG_ForceHigh ((uint8_t)0x42)
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#define PPSMC_MSG_ForceMediumOrHigh ((uint8_t)0x43)
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#define PPSMC_MSG_SwitchToMinimumPower ((uint8_t)0x51)
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#define PPSMC_MSG_ResumeFromMinimumPower ((uint8_t)0x52)
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#define PPSMC_MSG_EnableCac ((uint8_t)0x53)
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@ -1393,6 +1393,7 @@ static struct radeon_asic rv770_asic = {
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.get_mclk = &rv770_dpm_get_mclk,
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.print_power_state = &rv770_dpm_print_power_state,
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.debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
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.force_performance_level = &rv770_dpm_force_performance_level,
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},
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.pflip = {
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.pre_page_flip = &rs600_pre_page_flip,
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@ -1516,6 +1517,7 @@ static struct radeon_asic evergreen_asic = {
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.get_mclk = &rv770_dpm_get_mclk,
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.print_power_state = &rv770_dpm_print_power_state,
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.debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
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.force_performance_level = &rv770_dpm_force_performance_level,
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},
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.pflip = {
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.pre_page_flip = &evergreen_pre_page_flip,
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@ -1762,6 +1764,7 @@ static struct radeon_asic btc_asic = {
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.get_mclk = &btc_dpm_get_mclk,
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.print_power_state = &rv770_dpm_print_power_state,
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.debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
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.force_performance_level = &rv770_dpm_force_performance_level,
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},
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.pflip = {
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.pre_page_flip = &evergreen_pre_page_flip,
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@ -478,6 +478,8 @@ void rv770_dpm_print_power_state(struct radeon_device *rdev,
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struct radeon_ps *ps);
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void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
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struct seq_file *m);
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int rv770_dpm_force_performance_level(struct radeon_device *rdev,
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enum radeon_dpm_forced_level level);
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/*
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* evergreen
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@ -1471,13 +1471,29 @@ int rv770_restrict_performance_levels_before_switch(struct radeon_device *rdev)
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return 0;
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}
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int rv770_unrestrict_performance_levels_after_switch(struct radeon_device *rdev)
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int rv770_dpm_force_performance_level(struct radeon_device *rdev,
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enum radeon_dpm_forced_level level)
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{
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if (rv770_send_msg_to_smc(rdev, (PPSMC_Msg)(PPSMC_MSG_NoForcedLevel)) != PPSMC_Result_OK)
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PPSMC_Msg msg;
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if (level == RADEON_DPM_FORCED_LEVEL_HIGH) {
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if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_ZeroLevelsDisabled) != PPSMC_Result_OK)
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return -EINVAL;
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msg = PPSMC_MSG_ForceHigh;
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} else if (level == RADEON_DPM_FORCED_LEVEL_LOW) {
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if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK)
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return -EINVAL;
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msg = (PPSMC_Msg)(PPSMC_MSG_TwoLevelsDisabled);
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} else {
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if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK)
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return -EINVAL;
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msg = (PPSMC_Msg)(PPSMC_MSG_ZeroLevelsDisabled);
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}
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if (rv770_send_msg_to_smc(rdev, msg) != PPSMC_Result_OK)
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return -EINVAL;
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if (rv770_send_msg_to_smc(rdev, (PPSMC_Msg)(PPSMC_MSG_ZeroLevelsDisabled)) != PPSMC_Result_OK)
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return -EINVAL;
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rdev->pm.dpm.forced_level = level;
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return 0;
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}
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@ -2047,9 +2063,10 @@ int rv770_dpm_set_power_state(struct radeon_device *rdev)
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if (pi->dcodt)
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rv770_program_dcodt_after_state_switch(rdev, new_ps, old_ps);
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rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
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ret = rv770_unrestrict_performance_levels_after_switch(rdev);
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ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
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if (ret) {
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DRM_ERROR("rv770_unrestrict_performance_levels_after_switch failed\n");
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DRM_ERROR("rv770_dpm_force_performance_level failed\n");
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return ret;
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}
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@ -262,7 +262,8 @@ void rv770_stop_dpm(struct radeon_device *rdev);
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void r7xx_stop_smc(struct radeon_device *rdev);
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void rv770_reset_smio_status(struct radeon_device *rdev);
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int rv770_restrict_performance_levels_before_switch(struct radeon_device *rdev);
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int rv770_unrestrict_performance_levels_after_switch(struct radeon_device *rdev);
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int rv770_dpm_force_performance_level(struct radeon_device *rdev,
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enum radeon_dpm_forced_level level);
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int rv770_halt_smc(struct radeon_device *rdev);
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int rv770_resume_smc(struct radeon_device *rdev);
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int rv770_set_sw_state(struct radeon_device *rdev);
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