ARM: OMAP2+: Handle reset quirks for dynamically allocated modules
For dynamically allocated struct omap_hwmod data, we need to populate the device IP specific reset quirks. Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -336,6 +336,15 @@ static inline void omap5_secondary_hyp_startup(void)
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}
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}
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#endif
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#endif
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#ifdef CONFIG_SOC_DRA7XX
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extern int dra7xx_pciess_reset(struct omap_hwmod *oh);
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#else
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static inline int dra7xx_pciess_reset(struct omap_hwmod *oh)
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{
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return 0;
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}
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#endif
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void pdata_quirks_init(const struct of_device_id *);
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void pdata_quirks_init(const struct of_device_id *);
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void omap_auxdata_legacy_init(struct device *dev);
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void omap_auxdata_legacy_init(struct device *dev);
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void omap_pcs_legacy_init(int irq, void (*rearm)(void));
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void omap_pcs_legacy_init(int irq, void (*rearm)(void));
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@ -7,7 +7,15 @@
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#define OMAP4_MMC_REG_OFFSET 0x100
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#define OMAP4_MMC_REG_OFFSET 0x100
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struct omap_hwmod;
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struct omap_hwmod;
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#ifdef CONFIG_SOC_OMAP2420
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int omap_msdi_reset(struct omap_hwmod *oh);
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int omap_msdi_reset(struct omap_hwmod *oh);
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#else
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static inline int omap_msdi_reset(struct omap_hwmod *oh)
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{
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return 0;
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}
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#endif
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/* called from board-specific card detection service routine */
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/* called from board-specific card detection service routine */
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extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
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extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
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@ -155,6 +155,8 @@
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#include "soc.h"
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#include "soc.h"
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#include "common.h"
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#include "common.h"
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#include "clockdomain.h"
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#include "clockdomain.h"
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#include "hdq1w.h"
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#include "mmc.h"
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#include "powerdomain.h"
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#include "powerdomain.h"
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#include "cm2xxx.h"
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#include "cm2xxx.h"
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#include "cm3xxx.h"
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#include "cm3xxx.h"
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@ -165,6 +167,7 @@
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#include "prm33xx.h"
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#include "prm33xx.h"
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#include "prminst44xx.h"
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#include "prminst44xx.h"
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#include "pm.h"
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#include "pm.h"
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#include "wd_timer.h"
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/* Name of the OMAP hwmod for the MPU */
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/* Name of the OMAP hwmod for the MPU */
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#define MPU_INITIATOR_NAME "mpu"
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#define MPU_INITIATOR_NAME "mpu"
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@ -204,6 +207,20 @@ struct clkctrl_provider {
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static LIST_HEAD(clkctrl_providers);
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static LIST_HEAD(clkctrl_providers);
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/**
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* struct omap_hwmod_reset - IP specific reset functions
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* @match: string to match against the module name
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* @len: number of characters to match
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* @reset: IP specific reset function
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*
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* Used only in cases where struct omap_hwmod is dynamically allocated.
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*/
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struct omap_hwmod_reset {
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const char *match;
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int len;
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int (*reset)(struct omap_hwmod *oh);
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};
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/**
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/**
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* struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
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* struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
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* @enable_module: function to enable a module (via MODULEMODE)
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* @enable_module: function to enable a module (via MODULEMODE)
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@ -3542,6 +3559,57 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
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return 0;
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return 0;
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}
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}
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static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
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{ .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
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};
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static const struct omap_hwmod_reset dra7_reset_quirks[] = {
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{ .match = "pcie", .len = 4, .reset = dra7xx_pciess_reset, },
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};
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static const struct omap_hwmod_reset omap_reset_quirks[] = {
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{ .match = "dss", .len = 3, .reset = omap_dss_reset, },
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{ .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
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{ .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
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{ .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
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};
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static void
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omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
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const struct ti_sysc_module_data *data,
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const struct omap_hwmod_reset *quirks,
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int quirks_sz)
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{
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const struct omap_hwmod_reset *quirk;
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int i;
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for (i = 0; i < quirks_sz; i++) {
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quirk = &quirks[i];
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if (!strncmp(data->name, quirk->match, quirk->len)) {
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oh->class->reset = quirk->reset;
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return;
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}
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}
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}
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static void
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omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
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const struct ti_sysc_module_data *data)
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{
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if (soc_is_omap24xx())
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omap_hwmod_init_reset_quirk(dev, oh, data,
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omap24xx_reset_quirks,
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ARRAY_SIZE(omap24xx_reset_quirks));
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if (soc_is_dra7xx())
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omap_hwmod_init_reset_quirk(dev, oh, data, dra7_reset_quirks,
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ARRAY_SIZE(dra7_reset_quirks));
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omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
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ARRAY_SIZE(omap_reset_quirks));
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}
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/**
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/**
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* omap_hwmod_init_module - initialize new module
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* omap_hwmod_init_module - initialize new module
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* @dev: struct device
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* @dev: struct device
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@ -3580,6 +3648,8 @@ int omap_hwmod_init_module(struct device *dev,
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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omap_hwmod_init_reset_quirks(dev, oh, data);
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oh->class->name = data->name;
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oh->class->name = data->name;
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mutex_lock(&list_lock);
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mutex_lock(&list_lock);
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error = _register(oh);
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error = _register(oh);
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@ -1828,7 +1828,7 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
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* We use a PCIeSS HWMOD class specific reset handler to deassert the hardreset
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* We use a PCIeSS HWMOD class specific reset handler to deassert the hardreset
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* lines after asserting them.
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* lines after asserting them.
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*/
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*/
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static int dra7xx_pciess_reset(struct omap_hwmod *oh)
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int dra7xx_pciess_reset(struct omap_hwmod *oh)
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{
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{
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int i;
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int i;
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