ASoC: codecs: ad193x: Reset used registers at probe
Since the ad193x codecs have no software reset, we have to reinitialize the registers after a hardware reset to assure no previous values are kept. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -427,12 +427,22 @@ static void ad193x_reg_default_init(struct ad193x_priv *ad193x)
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{ 0, 0x99 }, /* PLL_CLK_CTRL0: pll input: mclki/xi 12.288Mhz */
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{ 1, 0x04 }, /* PLL_CLK_CTRL1: no on-chip Vref */
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{ 2, 0x40 }, /* DAC_CTRL0: TDM mode */
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{ 3, 0x00 }, /* DAC_CTRL1: reset */
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{ 4, 0x1A }, /* DAC_CTRL2: 48kHz de-emphasis, unmute dac */
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{ 5, 0x00 }, /* DAC_CHNL_MUTE: unmute DAC channels */
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{ 6, 0x00 }, /* DAC_L1_VOL: no attenuation */
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{ 7, 0x00 }, /* DAC_R1_VOL: no attenuation */
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{ 8, 0x00 }, /* DAC_L2_VOL: no attenuation */
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{ 9, 0x00 }, /* DAC_R2_VOL: no attenuation */
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{ 10, 0x00 }, /* DAC_L3_VOL: no attenuation */
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{ 11, 0x00 }, /* DAC_R3_VOL: no attenuation */
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{ 12, 0x00 }, /* DAC_L4_VOL: no attenuation */
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{ 13, 0x00 }, /* DAC_R4_VOL: no attenuation */
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};
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const struct ad193x_reg_default reg_adc_init[] = {
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{ 14, 0x03 }, /* ADC_CTRL0: high-pass filter enable */
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{ 15, 0x43 }, /* ADC_CTRL1: sata delay=1, adc aux mode */
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{ 16, 0x00 }, /* ADC_CTRL2: reset */
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};
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int i;
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