drm/i915: Unify ivb_update_cursor() and i9xx_update_cursor()
Ever since
commit 5efb3e2838
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Wed Apr 9 13:28:53 2014 +0300
drm/i915/chv: Add cursor pipe offsets
the only difference between i9xx_update_cursor() and ivb_update_cursor()
was the hsw+ pipe csc handling. Let's unify them and we can rid
outselves of some duplicated code.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -8104,43 +8104,6 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
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}
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cntl |= pipe << 28; /* Connect to correct pipe */
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}
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if (intel_crtc->cursor_cntl != cntl) {
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I915_WRITE(CURCNTR(pipe), cntl);
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POSTING_READ(CURCNTR(pipe));
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intel_crtc->cursor_cntl = cntl;
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}
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/* and commit changes on next vblank */
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I915_WRITE(CURBASE(pipe), base);
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POSTING_READ(CURBASE(pipe));
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}
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static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_crtc->pipe;
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uint32_t cntl;
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cntl = 0;
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if (base) {
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cntl = MCURSOR_GAMMA_ENABLE;
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switch (intel_crtc->cursor_width) {
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case 64:
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cntl |= CURSOR_MODE_64_ARGB_AX;
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break;
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case 128:
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cntl |= CURSOR_MODE_128_ARGB_AX;
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break;
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case 256:
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cntl |= CURSOR_MODE_256_ARGB_AX;
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break;
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default:
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WARN_ON(1);
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return;
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}
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}
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if (IS_HASWELL(dev) || IS_BROADWELL(dev))
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cntl |= CURSOR_PIPE_CSC_ENABLE;
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@ -8199,9 +8162,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
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I915_WRITE(CURPOS(pipe), pos);
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if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev) || IS_BROADWELL(dev))
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ivb_update_cursor(crtc, base);
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else if (IS_845G(dev) || IS_I865G(dev))
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if (IS_845G(dev) || IS_I865G(dev))
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i845_update_cursor(crtc, base);
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else
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i9xx_update_cursor(crtc, base);
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