common: DMA-mapping: add WRITE_COMBINE attribute
DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be buffered to improve performance. It will be used by the replacement for ARM/ARV32 specific dma_alloc_writecombine() function. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
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@ -31,3 +31,13 @@ may be weakly ordered, that is that reads and writes may pass each other.
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Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
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those that do not will simply ignore the attribute and exhibit default
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behavior.
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DMA_ATTR_WRITE_COMBINE
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----------------------
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DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
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buffered to improve performance.
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Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
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those that do not will simply ignore the attribute and exhibit default
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behavior.
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@ -13,6 +13,7 @@
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enum dma_attr {
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DMA_ATTR_WRITE_BARRIER,
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DMA_ATTR_WEAK_ORDERING,
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DMA_ATTR_WRITE_COMBINE,
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DMA_ATTR_MAX,
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};
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