gpio fixes for v6.0
- fix the check for pwm support on non-A8K platforms in gpio-mvebu -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmM2uJEACgkQEacuoBRx 13Jf9Q/+IHbeTT/EeYrurElRe/MOCKT69+QmPgrzDwhE/PeLf6Jan6h02HaB58kb mU6ruxMXSWmOypt8OMz/sepiR2qr263GhK/4sT5gvRLI44orx5ql8kzcMDpYZYib qWvnNZzyyWnF3x+SQYVWJ0GlNWQi6dZOzj5OMBLHZB2UxDbt3r8gpiqep3EHAzlR STiySnRYahWmbD0+/qfNtC1lUlfeuGIWDqROUaXW/wfPuOsNeo/aZtoArgqqCAYu 5bGGY47ENbTv5t1Tc2+Eh4GvMfEDLttqgNToTXmTg1BfCBlv6rhG68+yGJS7DCoj ZLg+GMvspKeY7w7HiGcRbkor9fMZ5bay7wTYSuuBQEUTOG3LrLJvl+mKxK7t8VTm kOr2YwX9QrtZo8XCGQ5WuD9CIeXAk1weP996GxTh5PNLrHPYca9hfzCBJadK0ay0 YgBdaVE3vt1I4Rl9NI1W2ySeNFS0pkf3JQFwhOrclDJ+HwP7GgTxwQlBue1oDVYw KCo17sabstTBbT56qODRTxSoXFRdgXmDj1z+emkf+/qcaeJPtDVOVZ9BJWcH6rJ+ 5gGdv8/lhBpaVBp4pB2XdD6Mf0/BvsZNyte0ytYqHiQuTH4HlNrA2dv3CBXmEnJO z81Vmjch4kYt6q5ZXVeJH/lfRImKwnzVzWzQZTyUlLNj+1UtS5E= =zdzJ -----END PGP SIGNATURE----- Merge tag 'gpio-fixes-for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio fixes from Bartosz Golaszewski: "One more fix for the upcoming release: - fix the check for pwm support on non-A8K platforms in gpio-mvebu" * tag 'gpio-fixes-for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: mvebu: Fix check for pwm support on non-A8K platforms
This commit is contained in:
commit
89e10b860c
|
@ -790,8 +790,12 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
|
|||
u32 offset;
|
||||
u32 set;
|
||||
|
||||
if (of_device_is_compatible(mvchip->chip.of_node,
|
||||
"marvell,armada-370-gpio")) {
|
||||
if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) {
|
||||
int ret = of_property_read_u32(dev->of_node,
|
||||
"marvell,pwm-offset", &offset);
|
||||
if (ret < 0)
|
||||
return 0;
|
||||
} else {
|
||||
/*
|
||||
* There are only two sets of PWM configuration registers for
|
||||
* all the GPIO lines on those SoCs which this driver reserves
|
||||
|
@ -801,13 +805,6 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
|
|||
if (!platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"))
|
||||
return 0;
|
||||
offset = 0;
|
||||
} else if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) {
|
||||
int ret = of_property_read_u32(dev->of_node,
|
||||
"marvell,pwm-offset", &offset);
|
||||
if (ret < 0)
|
||||
return 0;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (IS_ERR(mvchip->clk))
|
||||
|
|
Loading…
Reference in New Issue