From 89b16523d949b04c30b91e65bb6f91cac888e062 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Fri, 9 Sep 2022 13:31:12 +0100 Subject: [PATCH] dt-bindings: clk: microchip: mpfs: add reset controller support The "peripheral" devices on PolarFire SoC can be put into reset, so update the device tree binding to reflect the presence of a reset controller. Reviewed-by: Rob Herring Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220909123123.2699583-4-conor.dooley@microchip.com --- .../bindings/clock/microchip,mpfs.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml index 016a4f378b9b..1d0b6a4fda42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml @@ -40,8 +40,21 @@ properties: const: 1 description: | The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h - for the full list of PolarFire clock IDs. + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + + resets: + maxItems: 1 + + '#reset-cells': + description: + The AHB/AXI peripherals on the PolarFire SoC have reset support, so from + CLK_ENVM to CLK_CFM. The reset consumer should specify the desired + peripheral via the clock ID in its "resets" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + const: 1 required: - compatible